C8051F961-A-GM Silicon Labs, C8051F961-A-GM Datasheet - Page 235

• Manufacturer Part Number: C8051F961-A-GM
• Description: 8-bit Microcontrollers - MCU 128KB, DC-DC, LCD AES, QFN40
• Manufacturer: Silicon Labs

Specifications of C8051F961-A-GM

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8448 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.5 V to 3.3 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFN-40
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 34
• Number Of Timers: 4

17.5. Interrupt Register Descriptions
The SFRs used to enable the interrupt sources and set their priority level are described in the following
register descriptions. Refer to the data sheet section associated with a particular on-chip peripheral for
information regarding valid interrupt conditions for the peripheral and the behavior of its interrupt-pending
flag(s).
SmaRTClock Oscillator
Fail
SPI1
Pulse Counter
DMA0
Encoder0
AES
Notes:
1. Indicates a read-only interrupt pending flag. The interrupt enable may be used to prevent software from
2. Indicates a register located in an indirect memory space.
Interrupt Source
vectoring to the associated interrupt service routine.
Interrupt
0x00AB
0x008B
0x0093
0x009B
0x00A3
0x00B3
Vector
Table 17.1. Interrupt Summary
Priority
Order
17
18
19
20
21
22
RXOVRN (SPI1CN.4)
ENCERR(ENCCN.6)
Rev. 0.5
WCOL (SPI1CN.6)
MODF (SPI1CN.5)
SPIF (SPI1CN.7)
C0ZF (PC0CN.4)
C1ZF (PC0CN.6)
DMAMINT0...7
Pending Flag
(RTC0CN.5)
DMAINT0...7
(AESBCF.5)
AESDONE
OSCFAIL
2
N
N
N
N
N
N
N
N
N
N
N
N
C8051F96x
ERTC0F
(EIE2.2)
(EIE2.3)
(EIE2.4)
(EIE2.5)
(EIE2.6)
(EIE2.7)
EDMA0
EENC0
Enable
EAES0
ESPI1
EPC0
Flag
PFRTC0F
Control
(EIP2.2)
(EIP2.3)
(EIP2.4)
(EIP2.5)
(EIP2.6)
(EIP2.7)
Priority
PDMA0
PENC0
PAES0
PSPI1
PPC0
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