EDD1216AATA-5 ELPIDA [Elpida Memory], EDD1216AATA-5 Datasheet - Page 16

• Manufacturer Part Number: EDD1216AATA-5
• Description: 128M bits DDR SDRAM (8M words x 16 bits, DDR400)
• Manufacturer: ELPIDA [Elpida Memory]

Current state
Read*
Read with auto-pre-
charge*
Write*
Write recovering*
Data Sheet E0443E40 (Ver. 4.0)
8
6
7
9
/CS
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
/RAS /CAS /WE
H
H
H
H
L
L
L
H
H
H
H
L
L
L
H
H
H
H
L
L
L
H
H
H
H
L
L
L
H
H
L
L
H
H
L
H
H
L
L
H
H
L
H
H
L
L
H
H
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
Address
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
16
Command
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
Operation
NOP
NOP
BST
Interrupting burst read
operation to
start new read
ILLEGAL*
ILLEGAL*
Interrupting burst
read operation to
start pre-charge
ILLEGAL
NOP
NOP
ILLEGAL
ILLEGAL*
ILLEGAL*
ILLEGAL*
ILLEGAL*
ILLEGAL
NOP
NOP
ILLEGAL
Interrupting burst write
operation to
start read operation.
Interrupting burst write
operation to
start new write
operation.
ILLEGAL*
Interrupting write
operation to start pre-
charge.
ILLEGAL
NOP
NOP
ILLEGAL
Starting read operation. Read/ReadA
Starting new write
operation.
ILLEGAL*
ILLEGAL*
ILLEGAL
13
11
14
14
11, 14
11, 14
11
11
11
EDD1216AATA-5
Next state
Active
Active
Active
Active
—
—
Precharging
—
Precharging
Precharging
—
—
—
—
—
—
Write
recovering
Write
recovering
—
Read/ReadA
Write/WriteA
—
Idle
—
Active
Active
—
Write/WriteA
—
—
—