932S208YFLNT IDT [Integrated Device Technology], 932S208YFLNT Datasheet - Page 9

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932S208YFLNT

Manufacturer Part Number
932S208YFLNT
Description
Programmable Timing Control HubTM for Next Gen P4TM Processor
Manufacturer
IDT [Integrated Device Technology]
Datasheet
IDT
1
2
at 14.31818MHz
Electrical Characteristics - VCH, 48MHz, USB
T
Guaranteed by design, not 100% tested in production.
All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that Ref output is
A
ICS932S208
Programmable Timing Control Hub
TM
= 0 - 70°C; V
Output High Voltage
Output High Current
Output Low Voltage
Output Low Current
Programmable Timing Control Hub
Long Term Jitter
Long Accuracy
PARAMETER
Clock period
Duty Cycle
Edge Rate
Edge Rate
Rise Time
Fall Time
DD
= 3.3 V +/-5%; C
SYMBOL
T
TM
ppm
L
V
V
period
I
I
d
t
t
OH
OL
for Next Gen P4
= 10-20 pF (unless otherwise specified)
OH
r1
f1
TM
OL
t1
for Next Gen P4
see Tperiod min-max values
(8kHz frequency modulation
66.66MHz output nominal
TM
V
V
V
OL
OH
Processor
V
V
V
OH
125us period jitter
OL
Falling edge rate
OL
Rising edge rate
= 0.4 V, V
TM
OH
= 2.4 V, V
@ MAX = 3.135 V
CONDITIONS
I
@MIN = 1.95 V
@ MAX = 0.4 V
Processor
I
amplitude)
OH
@ MIN = 1.0 V
V
OL
T
= -1 mA
= 1.5 V
= 1 mA
9
OH
OL
= 2.4 V
= 0.4 V
20.8257
-200
MIN
-33
2.4
30
45
1
1
1
1
TYP
20.8340
MAX
0.55
200
-33
38
55
2
2
2
2
6
UNITS Notes
V/ns
V/ns
ppm
mA
mA
mA
mA
ns
ns
ns
ns
%
V
V
0743G—01/26/10
1,2
2
1
1
1
1
1
1

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