932S208YFLNT IDT [Integrated Device Technology], 932S208YFLNT Datasheet - Page 4

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932S208YFLNT

Manufacturer Part Number
932S208YFLNT
Description
Programmable Timing Control HubTM for Next Gen P4TM Processor
Manufacturer
IDT [Integrated Device Technology]
Datasheet
ICS932S208 follows Intel CK409B Yellow Cover specification. This clock synthesizer provides a single chip solution for next
generation P4 Intel processors and Intel chipsets. ICS932S208 is driven with a 14.318MHz crystal. It generates CPU outputs
up to 200MHz. It also provides a tight ppm accuracy output for Serial ATA support.
General Description
Block Diagram
Power Groups
IDT
ICS932S208
Programmable Timing Control Hub
48, 42
10,16
TM
VDD
Vtt_PWRGD#
N/A
24
36
55
34
Programmable Timing Control Hub
3
Pin Number
SDATA
FS_A
FS_B
SCLK
PD#
X1
X2
11,17
GND
25
39
54
33
53
45
6
XTAL
Control
Logic
Master clock, CPU Analog
TM
SRCCLK outputs
for Next Gen P4
PCICLK outputs
CPUCLK clocks
TM
for Next Gen P4
Description
48MHz, PLL
3V66 [0:3]
Xtal, Ref
Programmable
IREF
Spread
PLL2
PLL1
TM
Processor
TM
Processor
4
Programmable
Frequency
Frequency
Dividers
Dividers
STOP
Logic
48MHz, USB, DOT
REF (1:0)
CPUCLKT (3:0)
CPUCLKC (3:0)
SRCCLKT0
SRCCLKC0
3V66(4:0)
PCICLK (6:0)
PCICLKF (2:0)
I REF
0743G—01/26/10

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