932S208YFLNT IDT [Integrated Device Technology], 932S208YFLNT Datasheet - Page 2

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932S208YFLNT

Manufacturer Part Number
932S208YFLNT
Description
Programmable Timing Control HubTM for Next Gen P4TM Processor
Manufacturer
IDT [Integrated Device Technology]
Datasheet
Pin Description
IDT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
PIN #
ICS932S208
Programmable Timing Control Hub
TM
Programmable Timing Control Hub
REF0
REF1
VDDREF
X1
X2
GND
PCICLK_F0
PCICLK_F1
PCICLK_F2
VDDPCI
GND
PCICLK0
PCICLK1
PCICLK2
PCICLK3
VDDPCI
GND
PCICLK4
PCICLK5
PCICLK6
PD#
3V66_0
3V66_1
VDD3V66
GND
3V66_2
3V66_3
SCLK
PIN NAME
TM
IN
OUT
PWR
PWR
PWR
IN
PWR
OUT
OUT
PWR
OUT
OUT
OUT
PWR
OUT
OUT
OUT
OUT
PWR
OUT
OUT
OUT
OUT
OUT
PWR
OUT
OUT
IN
PIN TYPE
for Next Gen P4
TM
for Next Gen P4
14.318 MHz reference clock.
14.318 MHz reference clock.
Ref, XTAL power supply, nominal 3.3V
Crystal input, Nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Ground pin.
Free running PCI clock not affected by PCI_STOP# .
Free running PCI clock not affected by PCI_STOP# .
Free running PCI clock not affected by PCI_STOP# .
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output.
PCI clock output.
PCI clock output.
PCI clock output.
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output.
PCI clock output.
PCI clock output.
Asynchronous active low input pin used to power down the device into a
low power state. The internal clocks are disabled and the VCO and the
crystal are stopped. The latency of the power down will not be greater
than 1.8ms. Internal pull-up of 150K nominal.
3.3V 66.66MHz clock output
3.3V 66.66MHz clock output
Power pin for the 3V66 clocks.
Ground pin.
3.3V 66.66MHz clock output
3.3V 66.66MHz clock output
Clock pin of I2C circuitry 5V tolerant
TM
Processor
TM
Processor
2
DESCRIPTION
0743G—01/26/10

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