932S208YFLNT IDT [Integrated Device Technology], 932S208YFLNT Datasheet - Page 14

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932S208YFLNT

Manufacturer Part Number
932S208YFLNT
Description
Programmable Timing Control HubTM for Next Gen P4TM Processor
Manufacturer
IDT [Integrated Device Technology]
Datasheet
IDT
I
I
2
2
C Table: Output Control and Fix Frequency Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
C Table: Vendor & Revision ID Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ICS932S208
Programmable Timing Control Hub
TM
Programmable Timing Control Hub
Byte 6
Byte 7
15,18,19,20,22,23,2
6,27,29,31,32,37,38
8,19,20,22,23,26,27
7,8,9,12,13,14,15,1
,29,31,32,37,38,40,
1,2,7,8,9,12,13,14,
,40,41,43,44,46,47
40,41,43,44,46,47
41,43,44,46,47
37,38
2
1
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Test Clock Mode
FS Testmode
RESERVED
RESERVED
TM
SRC100#
Name
SSEN
Name
REF1
REF0
for Next Gen P4
RID3
RID2
RID1
RID0
VID3
VID2
VID1
VID0
TM
for Next Gen P4
TM
Control Function
Control Function
Processor
Spread Spectrum
Test Clock Mode
FS_A and FS_B
SRC Frequency
Output Control
Output Control
REVISION ID
TM
VENDOR ID
Operation
Processor
Enable
Select
-
-
14
Type
Type
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
R
R
-
-
100MHz
Disable
Disable
Disable
Normal
Spread
OFF
0
0
-
-
-
-
-
-
-
-
-
-
Test Mode
200MHz
Enable
Spread
Enable
Enable
ON
1
1
-
-
-
-
-
-
-
-
-
-
PWD
PWD
0743G—01/26/10
X
X
X
X
0
0
0
0
0
0
1
1
0
0
0
1

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