932S208YFLNT IDT [Integrated Device Technology], 932S208YFLNT Datasheet - Page 8

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932S208YFLNT

Manufacturer Part Number
932S208YFLNT
Description
Programmable Timing Control HubTM for Next Gen P4TM Processor
Manufacturer
IDT [Integrated Device Technology]
Datasheet
IDT
T
1
2
output is at 14.31818MHz
Electrical Characteristics - 48MHz DOT Clock
Output High Voltage
Guaranteed by design, not 100% tested in production.
Output High Current
Output Low Voltage
Output Low Current
All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that Ref
A
ICS932S208
Programmable Timing Control Hub
TM
Long Term Jitter
= 0 - 70°C; V
Long Accuracy
PARAMETER
Programmable Timing Control Hub
Clock period
Duty Cycle
Edge Rate
Edge Rate
Rise Time
Fall Time
DD
= 3.3 V +/-5%; C
SYMBOL
T
ppm
V
V
I
period
I
d
t
t
OH
OL
OH
OL
r1
f1
t1
TM
for Next Gen P4
TM
L
= 5-10 pF (unless otherwise specified)
for Next Gen P4
66.66MHz output nominal 20.8257
V
V
V
modulation amplitude)
see Tperiod min-max
OL
OH
V
V
V
OH
125us period jitter
OL
Falling edge rate
OL
Rising edge rate
(8kHz frequency
= 0.4 V, V
OH
= 2.4 V, V
TM
CONDITIONS
@ MAX = 3.135 V
@ MIN = 1.95 V
I
@ MAX = 0.4 V
I
Processor
OH
V
@ MIN = 1.0 V
OL
T
values
TM
= -1 mA
= 1.5 V
= 1 mA
Processor
OH
OL
= 2.4 V
= 0.4 V
8
-200
MIN
-33
2.4
0.5
0.5
30
45
2
2
TYP
20.8340
MAX
0.55
200
-33
38
55
4
4
1
1
2
UNITS
ppm
V/ns
V/ns
mA
mA
mA
mA
ns
ns
ns
ns
%
V
V
Notes
0743G—01/26/10
1,2
2
1
1
1
1
1
1

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