IC42S16100-5T ICSI [Integrated Circuit Solution Inc], IC42S16100-5T Datasheet - Page 26
IC42S16100-5T
Manufacturer Part Number
IC42S16100-5T
Description
512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
1.IC42S16100-5T.pdf
(78 pages)
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IC42S16100
26
Write With Auto-Precharge
The write with auto-precharge command first executes a
burst write operation and then puts the selected bank in the
precharged state automatically. After the precharge
completes the bank goes to the idle state. Thus this
command performs a write command and a precharge
command in a single operation.
During this operation, the delay period (t
last burst data input and the completion of the precharge
operation differs depending on the CAS latency setting.
The delay (t
precharge operation starts one clock period after the last
burst data input.
CAS latency = 3, burst length = 4
CAS latency = 2, burst length = 4
COMMAND
COMMAND
DAL
CLK
CLK
I/O
I/O
WRITE WITH AUTO-PRECHARGE
WRITE WITH AUTO-PRECHARGE
) is t
RP
WRITE A0
WRITE A0
plus one CLK period. That is, the
D
D
IN
IN
(BANK 0)
(BANK 0)
0
0
D
D
IN
IN
1
1
DAL
) between the
D
D
IN
IN
2
2
D
D
IN
IN
3
3
Therefore, the selected bank can be made active after a
delay of t
The selected bank must be set to the active state before
executing this command.
The auto-precharge function is invalid if the burst length is
set to full page.
CAS
CAS
CAS
CAS
CAS Latency
PRECHARGE START
PRECHARGE START
DAL
t
DAL
.
t
t
DAL
RP
t
t
DAL
ACT 0
RP
Integrated Circuit Solution Inc.
1CLK
+t
3
RP
DR024-0D 06/25/2004
1CLK
+t
2
ACT 0
RP
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