IC42S16100-5T ICSI [Integrated Circuit Solution Inc], IC42S16100-5T Datasheet - Page 25

• Manufacturer Part Number: IC42S16100-5T
• Description: 512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
• Manufacturer: ICSI [Integrated Circuit Solution Inc]

IC42S16100
Read With Auto-Precharge
The read with auto-precharge command first executes a
burst read operation and then puts the selected bank in the
precharged state automatically. After the precharge com-
pletes, the bank goes to the idle state. Thus this command
performs a read command and a precharge command in
a single operation.
During this operation, the delay period (t
last burst data output and the start of the precharge
operation differs depending on the CAS latency setting.
When the CAS latency setting is two, the precharge
operation starts on one clock cycle before the last burst
data is output (t
Integrated Circuit Solution Inc.
DR024-0D 06/25/2004
COMMAND
CAS latency = 2, burst length = 4
COMMAND
CAS latency = 3, burst length = 4
READ WITH AUTO-PRECHARGE
READ WITH AUTO-PRECHARGE
CLK
CLK
I/O
I/O
PQL
= –1). When the CAS latency setting is
(BANK 0)
(BANK 0)
READA 0
READA 0
PQL
) between the
D
PRECHARGE START
OUT
PRECHARGE START
0
D
D
OUT
OUT
0
1
three, the precharge operation starts on two clock cycles
before the last burst data is output (t
the selected bank can be made active after a delay of t
from the start position of this precharge operation.
The selected bank must be set to the active state before
executing this command.
The auto-precharge function is invalid if the burst length is
set to full page.
D
D
CAS
CAS
CAS Latency
CAS
CAS
OUT
OUT
t
PQL
t
1
2
PQL
t
D
D
RP
OUT
OUT
t
PQL
2
3
t
RP
D
ACT 0
OUT
3
–2
3
PQL
= –2). Therefore,
–1
2
ACT 0
25
RP