AT52SC1283J-70CI ATMEL [ATMEL Corporation], AT52SC1283J-70CI Datasheet - Page 34

• Manufacturer Part Number: AT52SC1283J-70CI
• Description: 128-Mbit Flash + 32-Mbit/64-Mbit
• Manufacturer: ATMEL [ATMEL Corporation]

28. Four-word Burst Read Waveform (Clock Latency of 4)
Note:
29. Burst Suspend Waveform
Notes:
34
1. The WAIT signal shown is for a burst configuration register of B10 and B8 = 1.
1. The WAIT signal (dashed line) shown is for a burst configuration register setting of B10 and B8 = 0. The WAIT Signal (solid
2. During Burst Suspend, CLK signal can be held low or high.
AT52SC1283J/1284J [Preliminary]
line) shown is for a burst configuration setting of B10 = 1 and B8 = 0.
I/O0-I/O15
I/O0-I/O15
A0-A22
WAIT
A0-A22
AVD
CLK
CE
OE
WAIT
AVD
CLK
CE
OE
(2)
(2)
(1)
t
t
AVCK
ACK
HIGH Z
t
CECK
t
CEAV
VALID
t
AAV
A
t
CKAV
t
AHCK
t
CE
t
AHAV
...
D0
B
t
t
QHCK
CLK
t
DF
D0
C
D1
D1
D2
t
OE
t
CKQV
D3
D1
D2
HIGH Z
t
CKH
t
CKL
t
CEQZ
3530B–STKD–2/4/05