ZL50051 ZARLINK [Zarlink Semiconductor Inc], ZL50051 Datasheet - Page 46

• Manufacturer Part Number: ZL50051
• Description: 8 K Channel Digital Switch with High Jitter Tolerance, Single Rate (8 or 16 Mbps), and 64 Inputs and 64 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

13.6
Addresses 00A3
Thirty-two Backplane Output Advancement Registers (BOAR0 to BOAR31) allow users to program the output
advancement for output data streams BSTo0 to BSTo31. The possible adjustment is -2 (15 ns), -4 (31 ns) or -6
(46 ns) cycles of the internal system clock (131.072 MHz).
The BOAR0 to BOAR31 registers are configured as follows:
13.6.1
The binary value of these two bits indicates the amount of offset that a particular stream output can be advanced
with respect to the output frame boundary. When the advancement is 0, the serial output stream has the normal
alignment with the generated frame pulse FP8o.
(where n = 0 to 31)
Backplane Output Advancement Registers (BOAR0 - BOAR31)
Backplane Output Advancement Bits 1-0 (BOA1-BOA0)
BOARn Bit
15:2
1:0
H
Table 22 - Backplane Output Advancement (BOAR) Programming Table
to 00C2
Table 21 - Backplane Output Advancement Register (BOAR) Bits
Backplane Output Advancement
H
Clock Rate 131.072 MHz
-2 cycles (~15 ns)
-4 cycles (~31 ns)
-6 cycles (~46 ns)
0 (Default)
Reserved
BOA[1:0]
Name
Zarlink Semiconductor Inc.
ZL50051/3
Reset
Value
0
0
46
Reserved
Must be set to 0 for normal operation
Backplane Output Advancement Value
BOA1
Advancement Bits
0
0
1
1
Corresponding
Description
BOA0
0
1
0
1
Data Sheet