ZL50051 ZARLINK [Zarlink Semiconductor Inc], ZL50051 Datasheet - Page 13

• Manufacturer Part Number: ZL50051
• Description: 8 K Channel Digital Switch with High Jitter Tolerance, Single Rate (8 or 16 Mbps), and 64 Inputs and 64 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Pin Description (continued)
Microprocessor Port Signals
LSTo16-31
Pin Name
LSTo0-15
D0 - D15
A0 - A14
LORS
121, 118, 119,
115, 113, 108,
116, 117, 114,
164, 163, 162
16, 13, 14, 11
Coordinates
102, 101, 98,
97, 96, 95,
94, 93, 92,
31, 30, 29,
28, 27, 26,
25, 24, 19,
18, 17, 15,
91, 86, 85
130, 129,
128, 127,
126, 125,
106, 105,
104, 103,
179, 180,
177, 178,
172, 171,
170, 169,
168, 167,
166, 165,
ZL50053
Package
(256 pin
LQFP)
107
84
J13, J14, J15,
Coordinates
M9, M8, M7,
M6, N9, N8,
B9, C5, C6,
N7, N6, P9,
R9, R8, R7,
A1, A2, A3,
A4, A5, B5,
B6, B7, B8,
P8, P7, P6,
C7, C8, C9
C13, C14,
C15, C16,
D13, D14,
D15, D16,
G13, G14,
G15, G16,
H13, H14,
H15, H16,
B13, B14,
B15, B16,
E13, E14,
F13, F14,
F15, F16,
E15, E16
ZL50051
Package
(256 ball
PBGA)
D12
J16
R6
Zarlink Semiconductor Inc.
ZL50051/3
Local Output Reset State (5 V Tolerant Input with Internal
Pull-down)
When this input is LOW, the device will initialize with the
LSTo0-31 outputs driven high. Following initialization, the
Local stream outputs are always active.
When this input is HIGH, the device will initialize with the
LSTo0-31 outputs at high impedance. Following initialization,
the Local stream outputs may be set active or high impedance
using the ODE pin or on a per-channel basis with the LE bit in
the Local Connection Memory.
Local Serial Output Streams 0 to 15 (5 V Tolerant Three-state
Outputs with Slew-Rate Control)
These pins output serial TDM data streams at a data rate of:
16.384 Mbps (with 256 channels per stream), or
8.192 Mbps (with 128 channels per stream).
Refer to the descriptions of the LORS and ODE pins for
control of the output HIGH or high impedance state.
Local Serial Output Streams 16 to 31 (5 V Tolerant Three-state
Outputs with Slew-Rate Control)
These pins output serial TDM data streams at a data rate of:
8.192 Mbps (with 128 channels per stream).
When the device operates at 16.384 Mbps, these pins are
unused, and therefore, the value output on these pins (either
driven-HIGH or high impedance) is dependent on the
configuration of the LORS pin.
Refer to the descriptions of the LORS and ODE pins for
control of the output HIGH or high impedance state.
Address 0 - 14 (5 V Tolerant Inputs)
These pins form the 15-bit address bus to the internal
memories and registers.
A0 = LSB
Data Bus 0 - 15 (5 V Tolerant Inputs/Outputs with
Slew-Rate Control)
These pins form the 16-bit data bus of the microprocessor
port.
D0 = LSB
13
Description
Data Sheet