ZL50051 ZARLINK [Zarlink Semiconductor Inc], ZL50051 Datasheet - Page 33

• Manufacturer Part Number: ZL50051
• Description: 8 K Channel Digital Switch with High Jitter Tolerance, Single Rate (8 or 16 Mbps), and 64 Inputs and 64 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

11.1
The 8-bit Local Data Memory (LDM) has 4,096 positions. The locations are associated with the Local input streams
and channels. As explained in the section above, address bits A13-A0 of the microprocessor define the addresses
of the streams and the channels. The LDM is read-only and configured as follows:
Note that the Local Data Memory is actually an 8-bit wide memory. The most significant 8 bits expressed in the
table above are presented to provide 16-bit microprocessor read accesses.
11.2
The 8-bit Backplane Data Memory (BDM) has 4,096 positions. The locations are associated with the Backplane
input streams and channels. As explained previously, address bits A13-A0 of the microprocessor define the
addresses of the streams and the channels. The BDM is read-only and configured as follows:
Note that the Backplane Data Memory is actually an 8-bit wide memory. The most significant 8 bits expressed in the
table above are presented to provide 16-bit microprocessor read accesses.
11.3
The Local Connection Memory (LCM) has 4,096 addresses of 16-bit words. Each address, accessed through bits
A13-A0 of the microprocessor port, is allocated to an individual Local output stream and channel. The bit definition
for each 16-bit word is presented in Table 10 for Source-to-Local connections.
The most-significant bit in the memory location, LSRC, selects the switch configuration for Backplane-to-Local or
Local-to-Local. When the per-channel Message Mode is selected (LMM memory bit = HIGH), the lower byte of the
LCM word (LCAB[7:0]) will be transmitted as data on the output stream (LSTo0-31) in place of data defined by the
Source Control, Stream and Channel Address bits.
15:8
15:8
Bit
7:0
Bit
7:0
Local Data Memory Bit Definition
Backplane Data Memory Bit Definition
Local Connection Memory Bit Definition
Reserved
Reserved
Name
Name
BDM
LDM
Set to a default value of 8’h00.
Local Data Memory - Local Input Channel Data
The LDM[7:0] bits contain the timeslot data from the Local side input TDM
stream. LDM[7] corresponds to the first bit received, e.g., bit 7 in ST-BUS mode,
bit 0 in GCI-Bus mode. See Figure 7, “ST-BUS and GCI-Bus Input Timing
Diagram for Different Data Rates” for the arrival order of the bits.
Set to a default value of 8’h00.
Backplane Data Memory - Backplane Input Channel Data.
The BDM[7:0] bits contain the timeslot data from the Backplane side input TDM
stream. BDM[7] corresponds to the first bit received, e.g., bit 7 in ST-BUS mode,
bit 0 in GCI-Bus mode. See Figure 7, “ST-BUS and GCI-Bus Input Timing
Diagram for Different Data Rates” for the arrival order of the bits
Table 9 - Backplane Data Memory (BDM) Bits
Table 8 - Local Data Memory (LDM) Bits
Zarlink Semiconductor Inc.
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Description
Description
Data Sheet