AM79C901AJCT AMD [Advanced Micro Devices], AM79C901AJCT Datasheet - Page 60

• Manufacturer Part Number: AM79C901AJCT
• Description: HomePHY Single-Chip 1/10 Mbps Home Networking PHY
• Manufacturer: AMD [Advanced Micro Devices]

TBR4: 10BASE-T Auto-Negotiation Advertisement Register (Register 4)
This register contains the advertised ability of the
Am79C901A home networking device. The purpose of
this register is to advertise the technology ability to the
link partner device. See Table 45.
60
12:11
Bits
4:0
15
14
13
10
9
8
7
6
5
Selector Field
Remote Fault
100BASE-TX
100BASE-TX
Half-Duplex -
Half-Duplex -
Full-Duplex -
Full-Duplex -
10BASE-T
10BASE-T
Table 45. TBR4: 10BASE-T Auto-Negotiation Advertisement Register (Register 4)
Next Page
Reserved
Reserved
Reserved
PAUSE
Name
When set, the device wishes to engage in next page exchange. If
cleared, the device does not wish to engage in next page
exchange.
When set, a remote fault bit is inserted into the base link code
word during the Auto-Negotiation process. When cleared, the
base link code work will have the bit position for remote fault as
cleared.
This bit should be set if the PAUSE capability is to be advertised.
This bit advertises Full-Duplex capability. When set, Full-Duplex
capability is advertised. When cleared, Full-Duplex capability is
not advertised.
This bit advertises Half-Duplex capability for the Auto-Negotiation
process. Setting this bit advertises Half-Duplex capability.
Clearing this bit does not advertise Half-Duplex capability.
This bit advertises Full-Duplex capability. When set, Full-Duplex
capability is advertised. When cleared, Full-Duplex capability is
not advertised.
This bit advertises Half-Duplex capability for the Auto-Negotiation
process. Setting this bit advertises Half-Duplex capability.
Clearing this bit does not advertise Half-Duplex capability.
The 10BASE-T PHY of the Am79C901A home networking device
is an 802.3 compliant device.
P R E L I M I N A R Y
Am79C901A
Description
W hen th is reg ister is m odifi ed, Restar t Auto-
Negotiation (Register 0, bit 9) must be enabled to
guarantee the change is implemented.
Read/
Write
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
Default
Value
(hex)
01
0
0
0
0
0
0
0
0
1
1