AM79C901AJCT AMD [Advanced Micro Devices], AM79C901AJCT Datasheet - Page 55

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AM79C901AJCT

Manufacturer Part Number
AM79C901AJCT
Description
HomePHY Single-Chip 1/10 Mbps Home Networking PHY
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
HPR28: HomePNA PHY ISBI Control Register (Register 28)
HPR29: HomePNA PHY TX Control Register
(Register 29)
HPR30: HomePNA PHY Drive Level Control Register (Register 30)
15:12
Bits
15:8
Bits
15:8
Bits
11:6
7:0
7:4
3:0
5:0
ISBI_SLOW
ISBI_FAST
TX_PULSE_WIDTH
TX_PULSE_CYCLES_N
TX_PULSE_CYCLES_P
Reserved
High Level Control
Low Level Control
Table 38. HPR30: HomePNA PHY Drive Level Control Register (Register 30)
Table 36. HPR28: HomePNA PHY ISBI Control Register (Register 28)
Table 37. HPR29: HomePNA PHY TX Control Register (Register 29)
Name
Name
Name
P R E L I M I N A R Y
This value defines the number of TCLKs (116.6 ns)
separating data pulses for Symbol 0 in low-speed
mode.
This value defines the number of TCLKs (116.6 ns)
separating data pulses for Symbol 0 in high-speed
mode.
This value defines the duration of a transmit pulse in
OSC cycles (16.7 ns). This will effectively determine
the transmit spectrum of the PHY.
This value defines the number of pulses that will be
driven onto the HRTXRX_N pin.
This value defines the number of pulses that will be
driven onto the HRTXRX_P pin.
Reserved. Must be written as 0. Read = X.
Defines the drive level that will be utilized in the High
Power mode.
Defines the drive level that will be utilized in the Low
Power mode.
Am79C901A
Description
Description
Description
Read/
Read/
Write
Write
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Default
Default
Default
Value
Value
(hex)
(hex)
Value
(hex)
2C
1C
04
XX
15
09
4
4
55

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