AM79C901AJCT AMD [Advanced Micro Devices], AM79C901AJCT Datasheet - Page 38

• Manufacturer Part Number: AM79C901AJCT
• Description: HomePHY Single-Chip 1/10 Mbps Home Networking PHY
• Manufacturer: AMD [Advanced Micro Devices]

The any1Home link packet consists of valid AID and
PCOM fields followed by four bytes of data. The receiv-
ing node’s MAC will interpret this packet as a runt frame
and will not forward the frame to upper layers, thus en-
suring that no system resources are required.
T h e A m 79 C 9 0 1A Ho m e P HY wi l l t ra n sm it t h e
any1Home Link Packet as a result of not transmitting a
normal Data packet within the last 400 ms time period.
Similarly, the HomePHY will determine that it is not
connected to a valid network (a link down state) after
not receiving any Data or Link packets for a period
greater than four seconds. The any1Home Link detec-
tion status is reported via the LED_LINK output pin and
in the HomePNA PHY Status Register (HPR1, bit 2).
See Table 18.
10BASE-T PHY
The 10BASE-T transceiver incorporates the physical
layer function, including both clock recovery (ENDEC)
and transceiver function. Data transmission over the
10BASE-T medium requires an integrated 10BASE-T
MAU. The transceiver meets the electrical require-
ments for 10BASE-T as specified in IEEE 802.3i. The
transmit signal is filtered on the transceiver to reduce
harmonic content per IEEE 802.3i. Since filtering is
performed in silicon, external filtering modules are not
needed. The 10BASE-T PHY transceiver receives 10
Mbps data from the MAC across the MII at 2.5 million
nibbles per second (parallel), or 10 million bits per sec-
ond (serial) for 10BASE-T. It then Manchester encodes
the data before transmission to the network.
The 10BASE-T block consists of the following sub-blocks:
Refer to Figure 22 for the 10BASE-T block diagram.
38
— Transmit Process
— Receive Process
— Interface Status
— Collision Detect Function
— Jabber Function
— Reverse Polarity Detect
P R E L I M I N A R Y
Am79C901A
Twisted Pair Transmit Function
Data transmission over the 10BASE-T medium re-
quires use of the integrated 10BASE-T MAU and uses
the differential driver circuitry on the TX± pins.
TX± is a differential twisted-pair driver. When properly
terminated, TX± will meet the transmitter electrical re-
quirements for 10BASE-T transmitters as specified in
IEEE 802.3, Section 14.3.1.2. The load is a twisted pair
cable that meets IEEE 802.3, Section 14.4.
Twisted Pair Receive Function
The RX+ port is a differential twisted-pair receiver.
When properly terminated, the RX+ port will meet the
electrical requirements for 10BASE-T receivers as
specified in IEEE 802.3, Section 14.3.1.3. The receiver
has internal filtering and does not require external filter
modules or common mode chokes.
Signals appearing at the RX± differential input pair are
routed to the internal decoder. The receiver function
meets the propagation delays and jitter requirements
specified by the 10BASE-T standard. The receiver
squelch level drops to half its threshold value after un-
squelch to allow reception of minimum amplitude sig-
nals and to mitigate carrier fade in the event of worst
case signal attenuation and crosstalk noise conditions.
Figure 22. 10BASE-T Transmit and Receive Data
Clock
Manchester
Encoder
TX Driver
TX±
Data
Paths
Clock
Manchester
RX Driver
Decoder
Squelch
Circuit
RX±
Data
22304B-24