AM79C901AJCT AMD [Advanced Micro Devices], AM79C901AJCT Datasheet - Page 41

• Manufacturer Part Number: AM79C901AJCT
• Description: HomePHY Single-Chip 1/10 Mbps Home Networking PHY
• Manufacturer: AMD [Advanced Micro Devices]

Instruction Register and Decoding Logic
After the TAP FSM is reset, the IDCODE instruction is
always invoked. The decoding logic gives signals to con-
trol the data flow in the data registers according to the
current instruction.
Boundary Scan Register
Each Boundary Scan Register (BSR) cell has two
stages. A flip-flop and a latch are used for the Serial
Shift Stage and the Parallel Output Stage, respectively.
There are four possible operation modes in the BSR
cell shown in Table 13.
Other Data Registers
Other data registers are the following:
1. Bypass register (1 bit)
2. Device ID register (32 bits) (Table 14).
Boundary Scan Cells
In Boundary Scan, most of the chip input and output
latches are linked together to form a scan chain.
Bits 31-28
Bits 27-12
Bits 11-1
Bit 0
Instruction
SAMPLE
EXTEST
IDCODE
BYPASS
BYPASS
TRI_ST
TRI_ST
Table 12. IEEE 1149.1 Supported Instruction
Name
1
2
3
4
Table 13. BSR Mode Of Operation
Table 14. Device ID Register
Instruction
Version
Part Number (1001 0000 0001 0000)
Manufacturer ID. The 11-bit manufacturer ID
code for AMD is 00000000001 in
accordance with JEDEC publication 106-A.
Always a logic 1
Code
0000
0001
0010
0011
1111
0011
1111
Summary
External Test
Bypass Scan Normal
Bypass Scan Normal
Description
System Function
Inspection
Boundary
Force Tri-
Force Tri-
ID Code
Sample
State
State
Capture
Update
Shift
Normal
Normal
Normal
Normal
Mode
Test
P R E L I M I N A R Y
Selected
Register
ID REG
Bypass
Bypass
Bypass
Bypass
Data
BSR
BSR
Am79C901A
The main purpose of this is board-level testing. See
Table 15.
To force the output pins, use SAMPLE to load the
BSR cells via the TDI pin and EXTEST to force the
output. Program the output cells, and set the control
cells to enable the output, or clear the control cells to
float the output.
To sample the chip inputs and outputs, use a SAMPLE
command and cell values are shifted out through the
TDO pin. Check the values in the input cells. Both input
and output pins have input-type cells.
BSR Cell
No.
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
Table 15. Boundary Scan Ring Order
CRS_COL_OEN
TX_CLK_OEN
RX_DV_RXEN
RX_DV_RXEN
RXD0_RXDAT
RXD0_RXDAT
TXD0_TXDAT
LED_POWER
XTAL_SEL_L
LED_SPEED
LED_SPEED
LED_SPEED
TXD3_CSN
GM_MODE
Cell Name
TXD1_SDI
RXD_OEN
PHY_SEL
RX_CLK
RX_CLK
TX_CLK
TX_CLK
RX_ER
RX_ER
TX_EN
RXD1
RXD1
RXD2
RXD2
RXD3
RXD3
TXD2
CRS
CRS
COL
COL
Type
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
Cell
CO
CO
CO
CO
CO
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
1
Pin
No.
39
32
32
30
30
28
27
25
24
23
22
22
21
19
19
17
15
15
13
13
11
11
10
10
–
–
–
9
9
8
8
6
6
6
5
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