AM79C901AJCT AMD [Advanced Micro Devices], AM79C901AJCT Datasheet - Page 52

• Manufacturer Part Number: AM79C901AJCT
• Description: HomePHY Single-Chip 1/10 Mbps Home Networking PHY
• Manufacturer: AMD [Advanced Micro Devices]

HPR20 and HPR21: HomePNA PHY RxCOMM Registers (Registers 20 and 21)
The 32-bit received data field to be used for out-of-
band communication between PHY management
entities. No protocol for out-of-band management
has been defined. Accessing the low word of the
register is sufficient to ensure that subsequently
received packets will not overwrite the register
HPR22: HomePNA PHY AID Register (Register 22)
The PHY’s AID address is used for collision detec-
tion. Unless bit 7 of the CONTROL register is set,
the PHY is assured to select a unique AID address.
HPR23: HomePNA PHY Noise Control Register (Register 23)
52
Bits
15:0
Bits
15:8
Bits
15:8
7:0
7:0
Table 29. HPR20 and HPR21: HomePNA PHY RxCOMM Registers (Registers 20 and 21)
PHY_RX_COMM (4)
PHY_AID
Noise Events
Noise Floor
Noise Ceiling
Table 31. HPR23: HomePNA PHY Noise Control Register (Register 23)
Name
Name
Name
Table 30. HPR22: HomePNA PHY AID Register (Register 22)
P R E L I M I N A R Y
The 32-bit preamble received by the HomePNA
PHY. HPR20 contains the high word and HPR21 the
low word.
The Access ID of this PHY.
If PHY_Control Disable AID Negotiation is set, then
writes to this bit will have no effect.
An 8-bit counter that records the number of noise
events detected. Overflows are held as FFh. Can be
cleared by setting bit 6 of HPR16.
If the input NOISE measurement (HPR25, bits 15:8)
exceeds the PEAK measurement (HPR25, bits 7:0),
this value is loaded into the NOISE Level register
HPR25, bits 15:8.
If the input NOISE measurement (HPR25, bits 15:8)
exceeds the PEAK measurement (HPR25, bits 7:0),
this value is loaded into the NOISE Level register
HPR25, bits 7:0.
Am79C901A
contents. A non-null received PCOM will set the
RxPCOM Valid bit of the Event Status Register
(HPR26). Accessing the high word of the register
clears this bit and allows overwriting of the register
by subsequent received packets.
Addresses above EFh are reserved. Address FFh is
defined to indicate a remote command.
Description
Description
Description
Read/Write
Read/Write
Read/
Write
R/W
R/W
R/W
R/W
R
Default
Default
Default
Value
Value
Value
(hex)
(hex)
(hex)
0000
FF
03
00
00