AM79C850KCW AMD [Advanced Micro Devices], AM79C850KCW Datasheet - Page 60

• Manufacturer Part Number: AM79C850KCW
• Description: SUPERNET-R 3
• Manufacturer: AMD [Advanced Micro Devices]

Node Processor Register Address Map
The registers accessible through the node processor
interface are addressed as shown in the table below.
MAC Interface
The AF interfaces to the FDDI MAC through the receive
data bus, MAC status and control signals, and the AF
match output signals. As described above, the AF loads
addresses to be compared as they are received from the
60
Mnemonic
AFCMD
AFSTAT
AFBIST
AFCOMP2
AFCOMP1
AFCOMP0
AFMASK2
AFMASK1
AFMASK0
AFPERS
Register
AMD
Address
“b0”
“b2”
“b4”
“b6”
“b8”
“ba”
“bc”
“be”
“c0”
“c2”
Address Filter Command
Register
Address Filter Status
Register
Address Filter BIST
Signature
Address Filter Comparand 2
Register
Address Filter Comparand 1
Register
Address Filter Comparand 0
Register
Address Filter Mask 2
Register
Address Filter Mask 1
Register
Address Filter Mask 0
Register
Address Filter Personality
Register
Register Name
P R E L I M I N A R Y
SUPERNET 3
network. The MAC signals the AF at the beginning of the
source and/or destination address through the MAC
address state machine’s state variable. The AF uses
this state variable to load six consecutive bytes into the
MAC comparand register and perform the comparison
of the address against the contents of the CAM when the
complete address is in the register. The AF signals the
MAC with the result of the comparison and if the
comparison is exact (as determined by the appropriate
bit in the personality byte). The AF will decode the
Frame Control (FC) field of the received frame and will
not participate in the address match if bit 6 of the FC is
zero (indicating a short address frame).
MAC Comparand Register
This is a 48-bit register that is loaded from the MAC
receive data bus. The data arrives one byte at a time and
is loaded byte serially into the register. An internal
multiplexer is driven by the state variable of the MAC
address state machine. Once started, the state machine
causes the register to load six consecutive bytes from
the receive data bus into the comparand register. Upon
completion of the loading of the register, the contents
will be transferred to the MAC comparand shadow
register for comparison with the contents of the CAM.
MAC Comparand Shadow Register
The MAC comparand shadow register receives the
contents of the MAC comparand register once that
register has been loaded with six bytes of address
information from the MAC receive data bus. This allows
the MAC comparand register to immediately begin
loading a subsequent address from the receive data bus
without interfering with the comparison function of the
AF. Once data has been transferred into the MAC
comparand shadow register, the contents of the shadow
register are compared with the contents of the CAM.