AM79C850KCW AMD [Advanced Micro Devices], AM79C850KCW Datasheet - Page 27

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AM79C850KCW

Manufacturer Part Number
AM79C850KCW
Description
SUPERNET-R 3
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
MSB
MENRS (bit 0)
MENXS (bit 1)
MENXCT (bit 2)
MENAFULL (bit 3)
MEIND0, MEIND1 (bits 4, 5)
MENQCTRL (bit 6)
MENRQAUNLCK (bit 7)
MENDAS (bit 8)*
MENPLCCST (bit 9)
MENSGLINT (bit 10)
MENDRCV (bit 11)
MENFCLOC (bit12,13)
MENTRCMD (bit 14)
MENTDLPBK (bit 15)
* This bit should only be set if the external PHY is available for a DAS configuration.
15
Bit
14
13
12
Figure 2. Register 3 (MDREG3) (NPADDR = 60h)
11
Enable enhanced Receive status encoding.
Enable enhanced Transmit status encoding.
Enable EXACT/INEXACT matching.
Enable enhanced QCTRL encoding for AFULL.
Enables enhanced A, C indicator setting.
Enables enhanced QCTRL encoding.
Enable Receive Queue Auto Unlock.
Enables DAS connections by controlling the MUX.
Enables Counter Segmentation Test in PLC block
Enables Vectored Interrupt reading. The MINTR4 is used as the Vectored Interrupt.
Enables dual receive queue operation.
Enables the FC location within the frame data long word.
Enables the ASYNC1 queue to transmit only after the command is issued.
Enable TDAT to RDAT loopback
10
P R E L I M I N A R Y
9
SUPERNET 3
8
7
6
Description
5
4
3
2
1
MENRQAUNLCK
MENPLCCST
0
MENTDLPBK
MENFCLOC0
MENFCLOC1
MENSGLINT
MENQCTRL
MENTRCMD
MENAFULL
MENDRCV
AMD
MENDAS
MENXCT
19574A-3
LSB
MEIND0
MEIND1
MENRS
MENXS
27

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