ZL30101QDC ZARLINK [Zarlink Semiconductor Inc], ZL30101QDC Datasheet - Page 9

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ZL30101QDC

Manufacturer Part Number
ZL30101QDC
Description
T1/E1 Stratum 3 System Synchronizer
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
Pin Description (continued)
Pin #
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
REF_SEL
C8/C32o
F8/F32o
F4/F65o
AGND
Name
REF0
REF1
AV
AV
C16o
F16o
C2o
NC
NC
NC
IC
DD
DD
Clock 8.192 MHz or 32.768 MHz (Output). This output is used for ST-BUS and GCI
operation at 8.192 Mbps or for operation with a 32.768 MHz clock. The output frequency
is selected via the OUT_SEL pin.
Positive Analog Supply Voltage. +3.3 V
Positive Analog Supply Voltage. +3.3 V
Clock 2.048 MHz (Output). This output is used for standard E1 interface timing and for
ST-BUS operation at 2.048 Mbps.
This clock output pad includes a Schmitt input which serves as a PLL feedback path;
proper transmission-line termination should be applied to maintain reflections below
Schmitt trigger levels.
Clock 16.384 MHz (Output). This output is used for ST-BUS operation with a
16.384 MHz clock.
This clock output pad includes a Schmitt input which serves as a PLL feedback path;
proper transmission-line termination should be applied to maintain reflections below
Schmitt trigger levels.
Frame Pulse (Output). This is an 8 kHz 122 ns active high framing pulse (OUT_SEL=0)
or it is an 8 kHz 31 ns active high framing pulse (OUT_SEL=1), which marks the
beginning of a frame.
This clock output pad includes a Schmitt input which serves as a PLL feedback path;
proper transmission-line termination should be applied to maintain reflections below
Schmitt trigger levels.
Frame Pulse ST-BUS 2.048 Mbps or ST-BUS at 65.536 MHz clock (Output). This
output is an 8 kHz 244 ns active low framing pulse (OUT_SEL=0), which marks the
beginning of an ST-BUS frame. This is typically used for ST-BUS operation at
2.048 Mbps and 4.096 Mbps. Or this output is an 8 kHz 15 ns active low framing pulse
(OUT_SEL=1), typically used for ST-BUS operation with a clock rate of 65.536 MHz.
Frame Pulse ST-BUS 8.192 Mbps (Output). This is an 8 kHz 61 ns active low framing
pulse, which marks the beginning of an ST-BUS frame. This is typically used for ST-BUS
operation at 8.192 Mbps.
Analog Ground. 0 V
Internal Connection. Connect this pin to ground.
Reference Select (Input). This input selects the input reference that is used for
synchronization, see Table 4 on page 19. This pin is internally pulled down to GND.
No internal bonding Connection. Leave unconnected.
Reference (Input). This is one of two (REF0, REF1) input reference sources used for
synchronization. One of five possible frequencies may be used: 8 kHz, 1.544 MHz,
2.048 MHz, 8.192 MHz or 16.384 MHz. This pin is internally pulled down to GND.
No internal bonding Connection. Leave unconnected.
Reference (Input). See REF0 pin description.
No internal bonding Connection. Leave unconnected.
Zarlink Semiconductor Inc.
ZL30101
9
Description
DC
DC
nominal.
nominal.
Data Sheet

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