ADP2116-EVALZ AD [Analog Devices], ADP2116-EVALZ Datasheet - Page 34

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ADP2116-EVALZ

Manufacturer Part Number
ADP2116-EVALZ
Description
Configurable, Dual 3 A/Single 6 A, Synchronous, Step-Down DC-to-DC Regulator
Manufacturer
AD [Analog Devices]
Datasheet
ADP2116
POWER DISSIPATION AND THERMAL CONSIDERATIONS
Power dissipated by the ADP2116 dual switching regulator is a
major factor that affects the efficiency of the two dc-to-dc
converters. The efficiency is given by
where:
P
P
The difference between the input power and the output power
is the power loss given by
The power loss of the step-down dc-to-dc converter is
approximated by
where:
P
P
The inductor losses are estimated (without core losses) by
where:
I
DCR
The ADP2116 power dissipation, P
conductive losses, the switch losses, and the transition losses of
each channel.
The power switch conductive losses are due to the output current
(I
MOSFET power switches that have internal resistance (R
The amount of conductive power loss can be calculated by
where:
D is the duty cycle, determined by D = V
R
R
Switching losses are associated with the current drawn by the
driver to turn the power of the devices on and off at the switching
frequency. The amount of switching power loss is given by
where:
C
C
OUT
IN
OUT
D
L
DSON-P
DSON-N
GATE-P
GATE-N
OUT
is the power dissipation on the ADP2116.
is the inductor power losses.
is the input power.
is the dc load current.
) flowing through the P-channel MOSFET and the N-channel
is the output power.
P
P
P
P
P
L
Efficiency
LOSS
LOSS
L
is the inductor series resistance.
COND
SW
is the P-channel MOSFET gate capacitance.
is the internal resistance of the P-channel MOSFET.
is the N-channel MOSFET gate capacitance.
is the internal resistance of the N-channel MOSFET.
= ( C
= P
= P
I
= [ R
OUT
IN
D
GATE-P
2
+ P
DSON-P
=
− P
× DCR
P
P
L
OUT
OUT
+ C
IN
× D + R
L
GATE-N
×
100%
) × V
DSON-N
IN
2
× (1 − D )] × I
D
× f
, includes the power switch
SW
OUT
/V
IN
.
OUT
2
DSON
(21)
(22)
(23)
(24)
(25)
Rev. 0 | Page 34 of 36
).
Transition losses occur because the P-channel power MOSFET
cannot be turned on or off instantaneously. The amount of
transition loss is calculated by
where t
switching node. In the ADP2116, the rise and fall times of the
switching node are in the order of 5 ns.
The power dissipated by the regulator increases the die junction
temperature, T
where the temperature rise, T
dissipation in the package, P
The proportionality coefficient is defined as the thermal resistance
from the junction of the die to the ambient temperature.
where θ
for the JEDEC 1S2P board; see Table 2).
When designing an application for a particular ambient
temperature range, calculate the expected ADP2116 power
dissipation (P
losses of both channels by using Equation 24, Equation 25,
and Equation 26, and estimate the temperature rise by using
Equation 27 and Equation 28. The reliable operation of the
two converters can be achieved only if the estimated die junction
temperature of the ADP2116 (Equation 27) is less than 125°C.
Therefore, at higher ambient temperatures, reduce the power
dissipation of the system. Figure 75 shows the power derating for
elevated ambient temperatures at various airflow conditions. The
area below the curves is the safe operation area for the ADP2116
dual regulators.
P
T
T
TRAN
J
R
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
RISE
= T
= θ
JA
Figure 75. Power Dissipation Derating (JEDEC 1S2P Board)
0
70
is the junction ambient thermal resistance (34°C/W
= V
AIR VELOCITY = 0 LFM
A
and t
JA
+ T
× P
D
IN
J
) due to conductive, switching, and transition
, above the ambient temperature, T
FALL
R
AIR VELOCITY = 500 LFM
× I
D
OUT
are the rise time and the fall time of the
AIR VELOCITY = 200 LFM
AMBIENT TEMPERATURE (°C)
× ( t
85
RISE
D
R
.
+ t
, is proportional to the power
FALL
) × f
SW
100
A
.
115
(26)
(27)
(28)

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