M58LT128HSB8ZA6 NUMONYX [Numonyx B.V], M58LT128HSB8ZA6 Datasheet - Page 89

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M58LT128HSB8ZA6

Manufacturer Part Number
M58LT128HSB8ZA6
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet

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M58LT128HST, M58LT128HSB
Table 40.
(P+32)h = 13Ch
(P+33)h = 13Dh
(P+3C)h = 146h
(P+3D)h = 147h
(P+34)h = 13Eh
(P+35)h = 13Fh
(P+3A)h = 144h
(P+3B)h = 145h
(P+3E)h = 148h
(P+36)h = 140h
(P+37)h = 141h
(P+38)h = 142h
(P+39)h = 143h
M58LT128HST (top)
Offset
Bank and Erase Block region 2 Information
Data
01h
00h
11h
00h
00h
02h
06h
00h
00h
02h
64h
00h
01h
(P+3C)h = 146h
(P+3D)h = 147h
(P+40)h = 14Ah
(P+41)h = 14Bh
(P+42)h = 14Ch
(P+43)h = 14Dh
(P+3A)h = 144h
(P+3B)h = 145h
(P+3E)h = 148h
(P+3F)h = 149h
(P+44)h = 14Eh
(P+45)h = 14Fh
(P+46)h = 150h
M58LT128HSB
Offset
(bottom)
Data
0Fh
11h
00h
07h
00h
00h
00h
01h
00h
02h
64h
00h
01h
Number of identical banks within bank region 2
Number of Program or Erase operations allowed
in bank region 2:
Bits 0-3: Number of simultaneous Program
operations
Bits 4-7: Number of simultaneous Erase
operations
Number of Program or Erase operations allowed
in other banks while a bank in this region is
programming
Bits 0-3: Number of simultaneous Program
operations
Bits 4-7: Number of simultaneous Erase
operations
Number of Program or Erase operations allowed
in other banks while a bank in this region is
erasing
Bits 0-3: Number of simultaneous Program
operations
Bits 4-7: Number of simultaneous Erase
operations
Types of Erase Block regions in Bank Region 2
n = number of Erase Block regions with
contiguous same-size erase blocks.
Symmetrically blocked banks have one blocking
region.
Bank region 2 Erase Block type 1 Information
Bits 0-15: n+1 = number of same-size erase
blocks
Bits 16-31: n×256 = number of bytes in Erase
Block region
Bank region 2 (Erase Block type 1)
Minimum Block Erase cycles × 1000
Bank region 2 (Erase Block type 1): BIts per cell,
internal ECC
Bits 0-3: bits per cell in Erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
(2)
Description
Common Flash Interface
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