M58LT128HSB8ZA6 NUMONYX [Numonyx B.V], M58LT128HSB8ZA6 Datasheet - Page 16

• Manufacturer Part Number: M58LT128HSB8ZA6
• Manufacturer: NUMONYX [Numonyx B.V]

Bus operations
3.5
3.6
16/110
Standby
Standby disables most of the internal circuitry, allowing a substantial reduction of the current
consumption. The memory is in Standby when Chip Enable and Reset are at V
power consumption is reduced to the standby level I
impedance, independently from the Output Enable or Write Enable inputs. If Chip Enable
switches to V
finished.
Reset
During Reset mode the memory is deselected and the outputs are high impedance. The
memory is in Reset mode when Reset is at V
Reset level, independently from the Chip Enable, Output Enable, or Write Enable inputs. If
Reset is pulled to V
content is no longer valid.
Table 3.
1. X = ‘Don't care’.
2. WAIT signal polarity is configured using the Set Configuration Register command.
3. L can be tied to V
4. Depends on G.
Bus Read
Bus Write
Address Latch
Output Disable
Standby
Reset
Operation
Bus operations
IH
during a Program or Erase operation, the device enters Standby mode when
IH
SS
if the valid address has been previously latched.
V
V
V
V
V
E
X
IH
IL
IL
IL
IL
during a Program or Erase, this operation is aborted and the memory
V
V
V
G
X
X
X
(1)
IH
IH
IL
V
V
V
V
W
X
X
IH
IH
IH
IL
V
V
V
IL
IL
IL
L
X
X
X
IL
. The power consumption is reduced to the
(3)
(3)
DD3
V
V
V
V
V
RP
V
IH
IH
IH
IH
IH
IL
and the outputs are set to high
M58LT128HST, M58LT128HSB
WAIT
Hi-Z
Hi-Z
Hi-Z
(2)
Data Output or Hi-Z
Data Output
DQ15-DQ0
Data Input
Hi-Z
Hi-Z
Hi-Z
IH
. The
(4)