M58LT128HSB8ZA6 NUMONYX [Numonyx B.V], M58LT128HSB8ZA6 Datasheet - Page 86

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M58LT128HSB8ZA6

Manufacturer Part Number
M58LT128HSB8ZA6
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet

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Common Flash Interface
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Table 36.
Table 37.
(P+ 11)h = 11Bh
(P+1D)h = 127h 0003h
(P+22)h = 12Ch
(P+10)h = 11Ah
(P+12)h = 11Ch
(P+13)h = 11Dh
(P+14)h = 11Eh
(P+1A)h = 124h
(P+1B)h = 125h
(P+1C)h = 126h
(P+1E)h = 128h
(P+1F)h = 129h
(P+20)h = 12Ah
(P+15)h = 11Fh
(P+16)h = 120h
(P+17)h = 121h
(P+18)h = 122h
(P+19)h = 123h
(P-21)h = 12Bh
(P+E)h = 118h
(P+F)h = 119h
Offset
Offset
Protection Register information
Burst Read information
0004h
0001h
0002h Synchronous mode read capability configuration 2
0003h
0007h
0002h
0080h Protection Field 1: Protection description
0000h
0003h
0003h
0089h
0000h
0000h
0000h
0000h
0000h
0000h
0010h
0000h
0004h
Data
Data
Page-mode read capability
Number of Synchronous mode read configuration fields that
follow.
Synchronous mode read capability configuration 1
Synchronous mode read capability configuration 3
Synchronous mode read capability configuration 4
Number of Protection Register fields in JEDEC ID space.
0000h indicates that 256 fields are available.
Bits 0-7 Lower byte of Protection Register address
Bits 8-15 Upper byte of Protection Register address
Bits 16-23 2
Bits 24-31 2
Protection Register 2: protection description
Bits 0-31 Protection Register address
Bits 32-39 n number of factory programmed regions (lower
byte)
Bits 40-47 n number of factory programmed regions (upper
byte)
Bits 48-55 2
Bits 56-63 n number of user programmable regions (lower
byte)
Bits 64-71 n number of user programmable regions (upper
byte)
Bits 72-79 2
bits 0-7 n’ such that 2
read-page bytes. See offset 0028h for device word width to
determine page-mode data output width.
bit 3-7 Reserved
bit 0-2 n’ such that 2
number of continuous synchronous reads when the device is
configured for its maximum word width. A value of 07h
indicates that the device is capable of continuous linear
bursts that output data until the internal burst counter
reaches the end of the device’s burstable address space.
This field’s 3-bit value can be written directly to the read
Configuration Register bit 0-2 if the device is configured for
its maximum word width. See offset 0028h for word width to
determine the burst data output width.
n
n
n
n
bytes in factory preprogrammed region
bytes in user-programmable region
bytes in factory programmable region
bytes in user programmable region
n+1
n
HEX value represents the number of
Description
Description
HEX value represents the maximum
M58LT128HST, M58LT128HSB
8 bytes
8 bytes
8 bytes
Value
Value
Cont.
80h
00h
89h
00h
00h
00h
16
16
16
2
0
0
0
0
8
4
4

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