ATAM894X-TNQY ATMEL [ATMEL Corporation], ATAM894X-TNQY Datasheet - Page 56

• Manufacturer Part Number: ATAM894X-TNQY
• Description: 8k-flash Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

6.3.3.8
6.3.3.9
56
ATAM894
Timer 3 Control Register 1 (T3C) Write
Timer 3 Status Register 1 (T3ST) Read
Table 6-13.
Note:
Note:
T3EIM
T3TOP
T3TS
T3R
T3ED
T3C2
T3C1
Mode
Write
Read
10
11
12
13
14
15
16
1. In this mode, the SSI can be used only as demodulator (8-bit NRZ rising edge). All other SSI
The status bits T3C1, T3C2 and T3ED will be reset after a READ access to T3ST.
T3M3
modes are not allowed.
0
0
0
0
0
0
0
Timer 3 Edge Interrupt Mask
T3EIM = 0, disables the interrupt when an edge event for Timer 3 occurs (T3I)
T3EIM = 1, enables the interrupt when an edge event for Timer 3 occurs (T3I)
Timer 3 Toggle Output Preset T3TOP = 0, sets toggle output (M3) to '0'
Timer 3 Toggle with Start . T3TS = 0, Timer 3 output is not toggled during the start
Timer 3 Run
Timer 3 Edge Detect
This bit will be set by the edge-detect logic of Timer 3 input (T3I)
Timer 3 Compare 2
This bit will be set when a match occurs between Counter 3 and T3CO2
Timer 3 Compare 1
This bit will be set when a match occurs between Counter 3 and T3CO1
Timer 3 Mode Select Bits (Continued)
T3M2
T3EIM
Bit 3
Bit 3
1
1
1
0
0
0
0
- - -
T3M1
............. ...... T3TOP = 1, sets toggle output (M3) to '1'
............. ...... Note: If T3R = 1, no output preset is possible
...... ...... T3TS = 1, Timer 3 output is toggled if started with T3R
...... ...... T3R = 0, Timer 3 stop and reset
...... ...... T3R = 1, Timer 3 run
1
0
0
1
1
0
0
T3TOP
T3ED
Bit 2
Bit 2
T3M0
0
1
0
1
0
1
0
T3TS
T3C2
Bit 1
Bit 1
Timer 3 Modes
Manchester demodulation/pulse-width demodulation
(T2O -> T3O)
Biphase demodulation (T2O -> T3O)
Timer/counter with external capture mode (T3I)
Not allowed
Not allowed
Not allowed
Not allowed
Primary register address: 'C'hex — Read
Primary register address: 'C'hex — Write
T3C1
Bit 0
T3R
Bit 0
Reset value: 0000b
Reset value: x000b
4679D–4BMCU–05/05
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