ATAM894X-TNQY ATMEL [ATMEL Corporation], ATAM894X-TNQY Datasheet - Page 4

• Manufacturer Part Number: ATAM894X-TNQY
• Description: 8k-flash Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

4.4
5. MARC4 Architecture
5.1
4
Reset Function
General Description
ATAM894
During each reset (power-on or brown-out) the configuration register is reset and reloaded with
the data from the configuration memory. This leads to a slightly different behavior compared to
the ROM versions. Both devices switch their I/Os to input during reset but the ROM part has the
mask selected pull-up or pull-down resistors active while the MTP has them removed until the
download is finished.
The MARC4 microcontroller consists of an advanced stack-based, 4-bit CPU core and on-chip
peripherals. The CPU is based on the Harvard architecture with physically separate program
memory (ROM) and data memory (RAM). Three independent buses, the instruction bus, the
memory bus and the I/O bus, are used for parallel communication between ROM, RAM and
peripherals. This enhances program execution speed by allowing both instruction prefetching,
and a simultaneous communication to the on-chip peripheral circuitry. The extremely powerful
integrated interrupt controller with associated eight prioritized interrupt levels supports fast and
efficient processing of hardware events. The MARC4 is designed for the high-level programming
language qFORTH. The core includes both, an expression and a return stack. This architecture
enables high-level language programming without any loss of efficiency or code density.
Figure 5-1.
System
Reset
clock
Clock
Reset
MARC4 Core
Sleep
Program
memory
Instruction
controller
Interrupt
decoder
Instruction
On-chip peripheral modules
bus
I/O bus
MARC4 CORE
PC
Memory bus
CCR
SP
RP
X
Y
TOS
ALU
256 x 4-bit
RAM
4679D–4BMCU–05/05