EPM2210F100A ALTERA [Altera Corporation], EPM2210F100A Datasheet - Page 69

no-image

EPM2210F100A

Manufacturer Part Number
EPM2210F100A
Description
MAX II Device Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet
Chapter 5: DC and Switching Characteristics
Timing Model and Specifications
Table 5–15. LE Internal Timing Microparameters
Table 5–16. IOE Internal Timing Microparameters (Part 1 of 2)
© Novermber 2008 Altera Corporation
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
Symbol
LUT
COMB
CLR
PRE
SU
H
CO
CLKHL
C
FASTIO
IN
GLOB
IOE
DL
OD
(2)
(1)
LE combinational LUT
delay
Combinational path delay
LE register clear delay
LE register preset delay
LE register setup time
before clock
LE register hold time after
clock
LE register clock-to-output
delay
Minimum clock high or low
time
Register control delay
Data output delay from
adjacent LE to I/O block
I/O input pad and buffer
delay
I/O input pad and buffer
delay used as global signal
pin
Internally generated output
enable delay
Input routing delay
Output delay buffer and pad
delay
f
Parameter
Parameter
For more explanations and descriptions about each internal timing microparameters
symbol, refer to the
Device Handbook.
Min
238
238
208
166
Min
–3 Speed
0
–3 Speed
Grade
Grade
Understanding Timing in MAX II Devices
Max
1,519
1,064
571
147
235
857
Max
159
708
354
224
Min
309
309
271
216
Min
0
–4 Speed
–4 Speed
Grade
Grade
1,114
1,974
1,383
Max
742
192
305
Max
207
920
374
291
Min
381
381
333
266
Min
–5 Speed
0
–5 Speed
Grade
Grade
1,372
1,132
2,430
1,702
Max
914
236
376
Max
254
460
358
Min
401
401
260
253
Min
–6 Speed
0
–6 Speed
Grade
Grade
chapter in the MAX II
1,215
1,356
2,261
1,319
Max
Max
170
907
530
318
243
380
Min
MAX II Device Handbook
Min
541
541
319
335
–7 Speed
–7 Speed
0
Grade
Grade
2,670
1,526
2,247
1,722
Max
348
970
966
410
Max
305
489
Unit
Unit
ps
ps
ps
ps
ps
ps
5–11
ps
ps
ps
ps
ps
ps
ps
ps
ps

Related parts for EPM2210F100A