PCF2129AT NXP [NXP Semiconductors], PCF2129AT Datasheet - Page 66

no-image

PCF2129AT

Manufacturer Part Number
PCF2129AT
Description
Integrated RTC, TCXO and quartz crystal
Manufacturer
NXP [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCF2129AT
Manufacturer:
NXP
Quantity:
3
Part Number:
PCF2129AT
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PCF2129AT/1
Manufacturer:
NXP
Quantity:
12 246
Part Number:
PCF2129AT/1,518
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PCF2129AT/1Ј¬512
Manufacturer:
PH3
Quantity:
3 040
Part Number:
PCF2129AT/2
0
Part Number:
PCF2129AT/2,518
Manufacturer:
NXP
Quantity:
100
Part Number:
PCF2129AT/2,518
Manufacturer:
NXP
Quantity:
30
Part Number:
PCF2129AT/2,518
Manufacturer:
NXP
Quantity:
250
Part Number:
PCF2129AT/2,518
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
23. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10. Dependency between POR and oscillator . . . . . .20
Fig 11. Power-On Reset (POR) system. . . . . . . . . . . . . .20
Fig 12. Power-On Reset Override (PORO) sequence,
Fig 13. Data flow of the time function. . . . . . . . . . . . . . . .25
Fig 14. Access time for read/write operations . . . . . . . . .25
Fig 15. Alarm function block diagram. . . . . . . . . . . . . . . .26
Fig 16. Alarm flag timing diagram . . . . . . . . . . . . . . . . . .28
Fig 17. WD_CD set logic 1: watchdog activates an
Fig 18. Timestamp detection with two push-buttons
Fig 19. Interrupt block diagram . . . . . . . . . . . . . . . . . . . .37
Fig 20. INT example for SI and MI when TI_TP is
Fig 21. INT example for SI and MI when TI_TP is
Fig 22. Example of shortening the INT pulse by
Fig 23. AF timing diagram . . . . . . . . . . . . . . . . . . . . . . . .40
Fig 24. STOP bit functional diagram . . . . . . . . . . . . . . . .43
Fig 25. STOP bit release timing . . . . . . . . . . . . . . . . . . . .43
Fig 26. Interface selection . . . . . . . . . . . . . . . . . . . . . . . .44
Fig 27. SDI, SDO configurations . . . . . . . . . . . . . . . . . . .45
Fig 28. Data transfer overview . . . . . . . . . . . . . . . . . . . . .45
Fig 29. SPI-bus write example . . . . . . . . . . . . . . . . . . . . .46
Fig 30. SPI-bus read example . . . . . . . . . . . . . . . . . . . . .46
Fig 31. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Fig 32. Definition of START and STOP conditions. . . . . .47
Fig 33. System configuration . . . . . . . . . . . . . . . . . . . . . .48
Fig 34. Acknowledgement on the I
Fig 35. Bus protocol, writing to registers . . . . . . . . . . . . .49
Fig 36. Bus protocol, reading from registers . . . . . . . . . .49
Fig 37. Device diode protection diagram of
Fig 38. I
Fig 39. I
Fig 40. Characteristic of frequency with respect to
Fig 41. SPI-bus timing . . . . . . . . . . . . . . . . . . . . . . . . . . .57
Fig 42. I
PCF2129A_1
Product data sheet
Block diagram of PCF2129A . . . . . . . . . . . . . . . . .3
Pin configuration for PCF2129A (SO20) . . . . . . . .4
Handling address registers . . . . . . . . . . . . . . . . . .6
Battery switch-over behavior in standard
mode with bit BIE logic 1 (enabled) . . . . . . . . . . .15
Battery switch-over behavior in direct switching
mode with bit BIE logic 1 (enabled) . . . . . . . . . . .16
Battery switch-over circuit, simplified block
diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Typical driving capability of V
with respect to the output load current I
Battery low detection behavior with bit BLIE
logic 1 (enabled) . . . . . . . . . . . . . . . . . . . . . . . . .18
Power failure event due to battery discharge:
reset occurs . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
valid for both I
interrupt when timed out . . . . . . . . . . . . . . . . . . .31
on one the TS pin (e.g. for tamper detection) . . .33
logic 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
logic 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
clearing the MSF flag . . . . . . . . . . . . . . . . . . . . . .39
PCF2129A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55
DD
DD
2
C-bus timing diagram; rise and fall times
as a function of temperature . . . . . . . . . . . . .53
as a function of V
2
C-bus and SPI-bus . . . . . . . . . . .21
DD
. . . . . . . . . . . . . . . . . . . .54
2
C-bus . . . . . . . . . . . .48
BBS
: (V
BBS
BBS
- V
Rev. 01 — 13 January 2010
DD
. . . . .17
)
Fig 43. Package outline SOT163-1 (SO20) . . . . . . . . . . 60
refer to 30 % and 70 % . . . . . . . . . . . . . . . . . . . . 59
Integrated RTC, TCXO and quartz crystal
PCF2129A
© NXP B.V. 2010. All rights reserved.
66 of 68

Related parts for PCF2129AT