PCF2129AT NXP [NXP Semiconductors], PCF2129AT Datasheet - Page 47

• Manufacturer Part Number: PCF2129AT
• Description: Integrated RTC, TCXO and quartz crystal
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCF2129A_1
Product data sheet
9.2.1 Bit transfer
9.2.2 START and STOP conditions
9.2.3 System configuration
9.2 I
The I
The two lines are a Serial DAta line (SDA) and a Serial Clock Line (SCL). Both lines are
connected to a positive supply via a pull-up resistor. Data transfer is initiated only when
the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line remains
stable during the HIGH period of the clock pulse as changes in the data line at this time
are interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line, while the clock is HIGH, is defined as the START condition S. A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition P (see
For this device a repeated START is not allowed for reading. Therefore a STOP has to be
released before the next START.
A device generating a message is a transmitter; a device receiving a message is the
receiver. The device that controls the message is the master; and the devices which are
controlled by the master are the slaves.
The PCF2129A can act as a slave transmitter and a slave receiver.
2
Fig 31. Bit transfer
Fig 32. Definition of START and STOP conditions
C-bus interface
2
C-bus is for bidirectional, two-line communication between different ICs or modules.
SDA
SCL
START condition
Figure
SDA
SCL
S
Rev. 01 — 13 January 2010
32).
data valid
data line
stable;
Figure
31).
Integrated RTC, TCXO and quartz crystal
allowed
change
of data
STOP condition
mbc621
PCF2129A
P
© NXP B.V. 2010. All rights reserved.
mbc622
SDA
SCL
47 of 68