ADF4106 Analog Devices, ADF4106 Datasheet - Page 3

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ADF4106

Manufacturer Part Number
ADF4106
Description
PLL Frequency Synthesizer
Manufacturer
Analog Devices
Datasheet

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Parameter
NOISE CHARACTERISTICS
NOTES
10
11
12
13
Specifications subject to change without notice.
TIMING CHARACTERISTICS
Parameter
t
t
t
t
t
t
Guaranteed by design but not production tested.
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
The phase noise is measured with the EVAL-ADF4106EB1 Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for
f
f
f
Operating temperature range (B Version) is –40°C to +85°C.
The BChip specifications are given as typical values.
Use a square wave for lower frequencies, below the mimimum stated.
This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency
AV
Guaranteed by design. Sample tested to ensure compliance.
T
T
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20logN (where N is the N divider value).
that is less than this value.
the synthesizer (f
REFIN
REFIN
REFIN
ADF4106 Phase Noise Floor
Phase Noise Performance
Spurious Signals
A
A
DD
= 25°C; AV
= 25°C; AV
900 MHz Output
5800 MHz Output
5800 MHz Output
900 MHz Output
5800 MHz Output
5800 MHz Output
= 10 MHz; f
= 10 MHz; f
= 10 MHz; f
= DV
DD
= 3 V
DD
DD
REFOUT
= DV
= DV
PFD
PFD
PFD
= 200 kHz; Offset Frequency = 1 kHz; f
= 200 kHz; Offset Frequency = 1 kHz; f
= 1 MHz; Offset Frequency = 1 kHz; f
DD
DD
= 10 MHz @ 0 dBm).
11
11
= 3 V; P = 16; RF
= 3.3 V; R = 16383; A = 63; B = 891; P = 32; RF
12
13
12
13
CLOCK
10
DATA
LE
LE
9
Limit at
T
(B Version)
10
10
25
25
10
20
MIN
DB23 (MSB)
to T
IN
B Version
–174
–166
–159
–93
–74
–84
–90/–92
–65/–70
–70/–75
= 6.0 GHz
MAX
(AV
T
A
= T
DD
= DV
MIN
t
RF
1
1
RF
RF
to T
= 5800 MHz; N = 5800; Loop B/W = 100 kHz
DB22
DD
= 900 MHz; N = 4500; Loop B/W = 20 kHz
= 5800 MHz; N = 29000; Loop B/W = 20 kHz
MAX
= 3 V
BChips
(typ)
–174
–166
–159
–93
–74
–84
–90/–92
–65/–70
–70/–75
t
2
unless otherwise noted.)
IN
10%; AV
2
= 6.0 GHz
DB2
Unit
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc typ
dBc typ
dBc typ
Unit
ns min
ns min
ns min
ns min
ns min
ns min
t
3
DD
≤ V
t
DB1 (CONTROL
4
P
≤ 5.5 V; AGND = DGND = CPGND = 0 V; R
BIT C2)
Test Conditions/Comments
@ 25 kHz PFD Frequency
@ 200 kHz PFD Frequency
@ 1 MHz PFD Frequency
@ VCO Output
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 1 MHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 1 MHz/2 MHz and 1 MHz PFD Frequency
(CONTROL BIT C1)
t
5
DB0 (LSB)
Test Conditions/Comments
DATA to CLOCK Setup Time
DATA to CLOCK Hold Time
CLOCK High Duration
CLOCK Low Duration
CLOCK to LE Setup Time
LE Pulsewidth
t
6
SET
= 5.1 k ;
ADF4106

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