k4t51043qb-gce6 Samsung Semiconductor, Inc., k4t51043qb-gce6 Datasheet - Page 36

• Manufacturer Part Number: k4t51043qb-gce6
• Description: 512mb B-die Ddr2 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

512Mb B-die DDR2 SDRAM
12. A minimum of two clocks (2 * tCK) is required irrespective of operating frequency
13. Timings are guaranteed with command/address input slew rate of 1.0 V/ns. See System Derating for
other slew rate values.
14. Timings are guaranteed with data, mask, and (DQS/RDQS in singled ended mode) input slew rate of 1.0
V/ns. See System Derating for other slew rate values.
15. Timings are guaranteed with CK/CK differential slew rate of 2.0 V/ns. Timings are guaranteed for DQS
signals with a differential slew rate of 2.0 V/ns in differential strobe mode and a slew rate of 1V/ns in single
ended mode. See System Derating for other slew rate values.
16. tDS and tDH (data setup and hold) derating
17. tIS and tIH (input setup and hold) derating
1) Input waveform timing is referenced from the input signal crossing at the V
2) Input waveform timing is referenced from the input signal crossing at the V
1) Input waveform timing is referenced from the input signal crossing at the V
2) Input waveform timing is referenced from the input signal crossing at the V
signal and V
DQS
DQS
signal and V
signal and V
signal and V
IL(dc)
IL(ac)
IL(dc)
IL(ac)
for a falling signal applied to the device under test
for a falling signal applied to the device under test.
for a falling signal applied to the device under test.
for a falling signal applied to the device under test.
tDS
tDH
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tDS
tDH
IH(ac)
IH(dc)
IH(ac)
IH(dc)
level for a rising
level for a rising
level for a rising
level for a rising
Rev. 0.91 (Sep. 2003)
DDR2 SDRAM
Preliminary
V
V
V
V
V
V
V
DDQ
IH(ac)
IH(dc)
REF
IL(dc)
IL(ac)
SS
max
max
min
min