at52br3224 ATMEL Corporation, at52br3224 Datasheet - Page 8

• Manufacturer Part Number: at52br3224
• Description: Single Plane Flash Combined With Sram
• Manufacturer: ATMEL Corporation

and valid data will be read. Examining the toggle bit may begin at any time during a pro-
gram cycle. Please see “Status Bit Table” on page 13 for more details.
The toggle bit status bit should be used in conjunction with the erase/program and V
PP
status bit as shown in the algorithm in Figures 3 and 4 on page 12.
ERASE/PROGRAM STATUS BIT: The device offers a status bit on I/O5, which indi-
cates whether the program or erase operation has exceeded a specified internal pulse
count limit. If the status bit is a “1”, the device is unable to verify that an erase or a word
program operation has been successfully performed. The device may also output a “1”
on I/O5 if the system tries to program a “1” to a location that was previously pro-
grammed to a “0”. Only an erase operation can change a “0” back to a “1”. If a program
(Sector Erase) command is issued to a protected sector, the protected sector will not be
programmed (erased). The device will go to a status read mode and the I/O5 status bit
will be set high, indicating the program (erase) operation did not complete as requested.
Once the erase/program status bit has been set to a “1”, the system must write the
Product ID Exit command to return to the read mode. The erase/program status bit is a
“0” while the erase or program operation is still in progress. Please see “Status Bit
Table” on page 13 for more details.
V
STATUS BIT: The 32-megabit Flash provides a status bit on I/O3, which provides
PP
information regarding the voltage level of the VPP pin. During a program or erase oper-
ation, if the voltage on the VPP pin is not high enough to perform the desired operation
successfully, the I/O3 status bit will be a “1”. Once the V
status bit has been set to a
PP
“1”, the system must write the Product ID Exit command to return to the read mode. On
the other hand, if the voltage level is high enough to perform a program or erase opera-
tion successfully, the V
status bit will output a “0”. Please see “Status Bit Table” on
PP
page 13 for more details.
SECTOR LOCKDOWN: Each sector has a programming lockdown feature. This feature
prevents programming of data in the designated sectors once the feature has been
enabled. These sectors can contain secure code that is used to bring up the system.
Enabling the lockdown feature will allow the boot code to stay in the device while data in
the rest of the device is updated. This feature does not have to be activated; any sec-
tor’s usage as a write-protected region is optional to the user.
At power-up or reset, all sectors are unlocked. To activate the lockdown for a specific
sector, the six-bus cycle Sector Lockdown command must be issued. Once a sector has
been locked down, the contents of the sector is read-only and cannot be erased or
programmed.
SECTOR LOCKDOWN DETECTION: A software method is available to determine if
programming of a sector is locked down. When the device is in the software product
identification mode (see “Software Product Identification Entry/Exit” sections on page
27), a read from address location 00002H within a sector will show if programming the
sector is locked down. If the data on I/O0 is low, the sector can be programmed; if the
data on I/O0 is high, the program lockdown feature has been enabled and the sector
cannot be programmed. The software product identification exit code should be used to
return to standard operation.
SECTOR LOCKDOWN OVERRIDE: The only way to unlock a sector that is locked
down is through reset or power-up cycles. After power-up or reset, the content of a sec-
tor that is locked down can be erased and reprogrammed.
ERASE SUSPEND/ERASE RESUME: The Erase Suspend command allows the sys-
tem to interrupt a sector or chip erase operation and then program or read data from a
different sector within the memory. After the Erase Suspend command is given, the
device requires a maximum time of 15 µs to suspend the erase operation. After the
AT52BR3224(T)/3228(T)
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