at52br3224 ATMEL Corporation, at52br3224 Datasheet - Page 10

• Manufacturer Part Number: at52br3224
• Description: Single Plane Flash Combined With Sram
• Manufacturer: ATMEL Corporation

10
AT52BR3224(T)/3228(T)
HARDWARE DATA PROTECTION: The Hardware Data Protection feature protects
against inadvertent programs to the Flash in the following ways: (a) V
below 1.8V (typical), the program function is inhibited. (b) V
has reached the V
before programming. (c) Program inhibit: holding any one of OE low, CE high or WE
high inhibits program cycles. (d) Noise filter: pulses of less than 15 ns (typical) on the
WE or CE inputs will not initiate a program cycle. (e) Program inhibit: V
V
tions are inhibited for 100 ns.
INPUT LEVELS: While operating with a 2.65V to 3.6V power supply, the address inputs
and control inputs (OE, CE and WE) may be driven from 0 to 5.5V without adversely
affecting the operation of the device. The I/O lines can only be driven from 0 to V
0.6V.
OUTPUT LEVELS: For the 32-megabit Flash, output high levels (V
V
- 2.2V output levels, V
lated to 2.65V - 3.0V (for minimum power).
ILPP
CCQ
. (f) V
- 0.2V (not V
PP
power-on delay: once V
CC
CC
). For 2.65V - 3.6V output levels, V
sense level, the device will automatically time out 10 ms (typical)
CCQ
must be regulated to 2.0V ± 10%, while V
PP
has reached 1.65V, program and erase opera-
CCQ
must be tied to V
CC
power-on delay: once V
CC
CC
OH
sense: if V
PP
must be regu-
) are equal to
CC
is less than
. For 1.8V
1682A–10/01
CC
CC
CC
is
+