at52br3224 ATMEL Corporation, at52br3224 Datasheet - Page 7

• Manufacturer Part Number: at52br3224
• Description: Single Plane Flash Combined With Sram
• Manufacturer: ATMEL Corporation

1682A–10/01
used to indicate the end of a program cycle. If the erase/program status bit is a “1”, the
device was not able to verify that the erase or program operation was performed
successfully.
VPP PIN: The circuitry of the 32-megabit Flash is designed so that the device can be
programmed or erased from the V
is greater than 1.65V and less than or equal to the VCC pin, the device selects the V
supply for programming and erase operations. When the VPP pin is greater than the
V
and erase operations. The device will allow for some variations between the V
and the V
If the VPP pin is within 0.3V of V
operations will use V
for program and erase operations, the V
to ensure proper operation. The V
PROGRAM/ERASE STATUS: The device provides several bits to determine the status
of a program or erase operation: I/O2, I/O3, I/O5, I/O6 and I/O7. The “Status Bit Table”
on page 13 and the following four sections describe the function of these bits. To pro-
vide greater flexibility for system designers, the 32-megabit Flash contains a
programmable configuration register. The configuration register allows the user to spec-
ify the status bit operation. The configuration register can be set to one of two different
values, “00” or “01”. If the configuration register is set to “00”, the part will automatically
return to the read mode after a successful program or erase operation. If the configura-
tion register is set to a “01”, a Product ID Exit command must be given after a successful
program or erase operation before the part will return to the read mode. It is important to
note that whether the configuration register is set to a “00” or to a “01”, any unsuccessful
program or erase operation requires using the Product ID Exit command to return the
device to read mode. The default value (after power-up) for the configuration register is
“00”. Using the four-bus cycle Set Configuration Register command as shown in the
“Command Definition in Hex” table on page 14, the value of the configuration register
can be changed. Voltages applied to the RESET pin will not alter the value of the config-
uration register. The value of the configuration register will affect the operation of the
I/O7 status bit as described below.
DATA POLLING: The 32-megabit Flash features Data Polling to indicate the end of a
program cycle. If the status configuration register is set to a “00”, during a program cycle
an attempted read of the last word loaded will result in the complement of the loaded
data on I/O7. Once the program cycle has been completed, true data is valid on all out-
puts and the next cycle may begin. During a chip or sector erase operation, an attempt
to read the device will give a “0” on I/O7. Once the program or erase cycle has com-
pleted, true data will be read from the device. Data Polling may begin at any time during
the program cycle. Please see “Status Bit Table” on page 13 for more details.
If the status bit configuration register is set to a “01”, the I/O7 status bit will be low while
the device is actively programming or erasing data. I/O7 will go high when the device
has completed a program or erase operation. Once I/O7 has gone high, status informa-
tion on the other pins can be checked.
The Data Polling status bit must be used in conjunction with the erase/program and V
status bit as shown in the algorithm in Figures 1 and 2 on page 11.
TOGGLE BIT: In addition to Data Polling the 32-megabit Flash provides another
method for determining the end of a program or erase cycle. During a program or erase
operation, successive attempts to read data from the memory will result in I/O6 toggling
between one and zero. Once the program cycle has completed, I/O6 will stop toggling
CC
supply, the device will select the V
CC
power supply in its selection of V
CC
and disregard the V
CC
CC
pp
pin cannot be left floating.
for 2.65V < V
power supply or from the VPP input pin. When V
PP
PP
AT52BR3224(T)/3228(T)
must be in the 5V ± 0.5V or 12V ± 0.5V range
input as the power supply for programming
PP
CC
input signal. When the V
or V
CC
PP
< 3.6V, then the program or erase
for program or erase operations.
PP
signal is used
PP
input
CC
PP
PP
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