ht82j30r Holtek Semiconductor Inc., ht82j30r Datasheet - Page 13

• Manufacturer Part Number: ht82j30r
• Description: Ht82j30r/ht82j30a -- 16 Channel A/d Mcu With Spi Interface
• Manufacturer: Holtek Semiconductor Inc.

In addition, on entering an interrupt sequence or execut-
ing a subroutine call, the status register will not be
pushed onto the stack automatically. If the contents of
the status registers are important and if the interrupt rou-
tine can change the status register, precautions must be
taken to correctly save it.
Interrupt Control Registers - INTC, INTC1
The microcontrollers provide two external interrupts, an
internal timer/event counter overflow interrupt, an A/D
converter end-of-converter interrupt and two SPI inter-
rupt. By setting various bits within this register using stan-
dard bit manipulation instructions, the enable/disable
function of each interrupt can be independently con-
trolled. A master interrupt bit within this register, the EMI
bit, acts like a global enable/disable and is used to set all
of the interrupt enable bits on or off. This bit is cleared
when an interrupt routine is entered to disable further in-
terrupt and is set by executing the RETI instruction.
Timer/Event Counter Registers - TMR, TMRC
Both devices possess a single internal 8-bit count-up
timer. An associated register known as TMR is the loca-
tion where the timers 8-bit value is located. This register
can also be preloaded with fixed data to allow different
time intervals to be setup. An associated control regis-
ter, known as TMRC, contains the setup information for
this timer, which determines in what mode the timer is to
be used as well as containing the timer on/off control
function.
Input/Output Ports and Control Registers
Within the area of Special Function Registers, the I/O
registers and and their associated control registers play
a prominent role. All I/O ports have a designated regis-
ter correspondingly labeled as PA, PB, PC, PD and PF.
These labeled I/O registers are mapped to specific ad-
dresses within the Data Memory as shown in the Data
Memory table, which are used to transfer the appropri-
ate output or input data on that port. With each I/O pport
there is an associated control register labeled PAC,
PBC, PCC, PDC and PFC, also mapped to specific ad-
dresses with the Data Memory. The control register
specifies which pins of that port are set as inputs and
which are set as outputs. To setup a pin as an input, the
corresponding bit of the control register must be set
high, for an output it must be set low. During program in-
itialisation, it is important to first setup the control regis-
ters to specify which pins are outputs and which are
inputs before reading data from or writing data to the I/O
ports. One flexible feature of these registers is the ability
to directly program single bits using the SET [m].i and
from output to input and vice versa by manipulating spe-
cific bits of the I/O control registers during normal pro-
gram operation is a useful feature of these devices.
Rev. 1.10
CLR [m].i instructions. The ability to change I/O pins
13
Input/Output Ports
Holtek microcontrollers offer considerable flexibility on
their I/O ports. With the input or output designation of ev-
ery pin fully under user program control, pull-high op-
tions for all ports and wake-up options on certain pins,
the user is provided with an I/O structure to meet the
needs of a wide range of application possibilities.
Depending upon which package is chosen, the
microcontroller provides up to 35 bidirectional input/out-
put lines labeled with port names PA, PB, PC, PD and PF.
This register is mapped to the Data Memory with an ad-
dresses as shown in the Special Purpose Data Memory
table. Seven of these I/O lines can be used for input and
output operations and one line as an input only. For in-
put operation, these ports are non-latching, which
means the inputs must be ready at the T2 rising edge of
instruction MOV A,[m] , where m denotes the port ad-
dress. For output operation, all the data is latched and
remains unchanged until the output latch is rewritten.
Pull-high Resistors
Many product applications require pull-high resistors for
their switch inputs usually requiring the use of an exter-
nal resistor. To eliminate the need for these external re-
sistors, I/O pins, when configured as an input have the
capability of being connected to an internal pull-high re-
sistor. The pull-high resistors are selectable via configu-
ration options and are implemented using weak PMOS
transistors.
Port A Wake-up
If the HALT instruction is executed, the device will enter
the Power Down Mode, where the system clock will stop
resulting in power being conserved, a feature that is im-
portant for battery and other low-power applications.
Various methods exist to wake-up the microcontroller,
one of which is to change the logic condition on one of
the Port A pins from high to low. After a HALT instruction
forces the microcontroller into entering the Power Down
Mode, the processor will remain idle or in a low-power
state until the logic condition of the selected wake-up pin
on Port A changes from high to low. This function is es-
pecially suitable for applications that can be woken up
via external switches. Note that each pin on Port A can
be selected individually to have this wake-up feature.
I/O Port Control Registers
Each I/O port has its own control register PAC, PBC,
PCC, PDC and PFC, to control the input/output configu-
ration. With this control register, each CMOS output or in-
put with or without pull-high resistor structures can be
reconfigured dynamically under software control. Each of
the I/O ports is directly mapped to a bit in its associated
port control register. Note that several pins can be setup
to have NMOS outputs using configuration options.
HT82J30R/HT82J30A
March 13, 2008