ht82a836r Holtek Semiconductor Inc., ht82a836r Datasheet - Page 50

• Manufacturer Part Number: ht82a836r
• Description: Usb Audio Mcu
• Manufacturer: Holtek Semiconductor Inc.

Operation Mode Control Register
The OPER_MODE register is used to control certain operational operational modes. The operation mode is used to
control the
Play/Record Data
The Play and Record data for the device is contained in 4 Play registers and 2 Record registers. The play/record inter-
rupt will be activated when play/record data in the PLAY_DATA or RECORD_DATA registers is valid. The
PLAY_DATA/RECORD_DATA registers will latch data until the next interrupt is generated. The DAC PLAY_DATA reg-
ister contains an unsigned value with a range of 0~FFFFH. The RECORD_DATA is stored in 2 s complement format
with a range of 8000H~7FFFH.
The update rate of the PCM ADC RECORD_DATA is 8kHz with the Record_Freq bit in the MODE_CTRL register is
equal to 0, or 16kHz if the bit is set to 1. The update rate for the PLAY_DATA is 48kHz, if the PLAY_MODE bit in the
MODE_CTRL register is equal to 0, or 8kHz if the bit is equal to 1. All of the PLAY and RECORD registers are read only.
The play data format is controlled by bit PLAY_U_EN in the OPER_MODE register.
The record data registers RECORD_DATA_L/RECORD_DATA_H will not be affected by bit RECORD_U_EN in the
OPER_MODE register. The record data registers RECORD_DATA_L/RECORD_DATA_H are in PCM format.
Rev. 1.00
PLAY_DATAL_L
PLAY_DATAL_H
PLAY_DATAR_L
PLAY_DATAR_H
RECORD_DATA_L
RECORD_DATA_H
PLAY_U_EN=0
PLAY_U_EN=1
Name
law compander enable/disable for the speaker and microphone data.
PCM (Left Channel
PLAY_DATAL_L
PR_D15
PL_D15
PR_D7
R_D15
PL_D7
Low Byte)
R_D7
b7
N/A
Operation Mode Control Register - OPER_MODE
PR_D14
PL_D14
PR_D6
R_D14
PL_D6
R_D6
b6
PCM (Left Channel
PLAY_DATAL_H
Law (Left Channel)
PR_D13
PL_D13
PR_D5
PL_D5
R_D13
R_D5
High Byte)
b5
50
PR_D12
PL_D12
PR_D4
PL_D4
R_D12
R_D4
b4
PCM (Right Channel
PLAY_DATAR_L
PR_D11
PL_D11
PR_D3
PL_D3
R_D11
R_D3
b3
Low Byte)
N/A
PR_D10
PL_D10
PR_D2
PL_D2
R_D10
R_D2
b2
PCM (Right Channel
Law (Right Channel)
PLAY_DATAR_H
PR_D1
PR_D9
PL_D1
PL_D9
R_D1
R_D9
b1
HT82A836R
High Byte)
March 20, 2008
PR_D0
PR_D8
PL_D0
PL_D8
R_D0
R_D8
b0