ht82a836r Holtek Semiconductor Inc., ht82a836r Datasheet - Page 25

• Manufacturer Part Number: ht82a836r
• Description: Usb Audio Mcu
• Manufacturer: Holtek Semiconductor Inc.

Interrupts
Interrupts are an important part of any microcontroller
system. When a USB Interrupt, play/record data valid in-
terrupt, a Timer/Event Counter overflow, reception of
SPI data, A/D Interrupt or External Interrupt is occurs,
their corresponding interrupt will enforce a temporary
suspension of the main program allowing the
microcontroller to direct attention to their respective
needs. The device provides a USB interrupt, two inter-
nal timer/event counter interrupts, a play/record data
valid interrupt and a Multi function interrupt. This latter
Multi-function Interrupt represents the Serial Interface
Interrupt, A/D Interrupt or the External Interrupt.
Interrupt Registers
Overall interrupt control, which means interrupt enabling
and request flag setting, is controlled by three interrupt
control registers INTC0, INTC1 and MFI1C which are lo-
cated in the Data Memory. By controlling the appropriate
enable bits in this register each individual interrupt can
be enabled or disabled. Also when an interrupt occurs,
the corresponding request flag will be set by the
microcontroller. The global enable flag if cleared to zero
will disable all interrupts.
Interrupt Operation
A USB interrupt, a Play or Record data valid interrupt, a
Timer/Event Counter overflow, an SPI interrupt, an A/D
conversion complete interrupt or an active edge on the
external interrupt pin will all generate an interrupt re-
quest by setting their corresponding request flag, if their
appropriate interrupt enable bit is set. When this hap-
pens, the Program Counter, which stores the address of
the next instruction to be executed, will be transferred
onto the stack. The Program Counter will then be loaded
with a new address which will be the value of the corre-
sponding interrupt vector. The microcontroller will then
fetch its next instruction from this interrupt vector. The
instruction at this vector will usually be a JMP statement
which will jump to another section of program which is
known as the interrupt service routine. Here is located
the code to control the appropriate interrupt. The inter-
rupt service routine must be terminated with a RETI
statement, which retrieves the original Program Counter
address from the stack and allows the microcontroller to
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25
continue with normal execution at the point where the in-
terrupt occurred. The various interrupt enable bits, to-
gether with their associated request flags, are shown in
the following diagram with their order of priority. Once
an interrupt subroutine is serviced, all the other inter-
rupts will be blocked, as the EMI bit will be cleared auto-
matically. This will prevent any further interrupt nesting
from occurring. However, if other interrupt requests oc-
cur during this interval, although the interrupt will not be
immediately serviced, the request flag will still be re-
corded. If an interrupt requires immediate servicing
while the program is already in another interrupt service
routine, the EMI bit should be set after entering the rou-
tine, to allow interrupt nesting. If the stack is full, the in-
terrupt request will not be acknowledged, even if the
related interrupt is enabled, until the Stack Pointer is
decremented. If immediate service is desired, the stack
must be prevented from becoming full.
Interrupt Priority
Interrupts, occurring in the interval between the rising
edges of two consecutive T2 pulses, will be serviced on
the latter of the two T2 pulses, if the corresponding inter-
rupts are enabled. In case of simultaneous requests, the
following table shows the priority that is applied. These
can be masked by resetting the EMI bit.
In cases where both USB and Play interrupts are en-
abled and where an USB and Play interrupt occurs si-
multaneously, the USB interrupt will always have priority
and will therefore be serviced first. Suitable masking of
the individual interrupts using the interrupt registers can
prevent simultaneous occurrences.
No.
a
b
c
d
e
f
USB Interrupt
Timer/Event Counter 0 overflow
Timer/Event Counter 1 overflow
Play Interrupt
Multi function 1 interrupt subrou-
tine:Serial Interface Interrupt,
A/D Interrupt, External Interrupt
Record Interrupt
Interrupt Source
HT82A836R
Priority Vector
March 20, 2008
1
2
3
4
5
6
0CH
04H
08H
10H
14H
18H