ht82a836r Holtek Semiconductor Inc., ht82a836r Datasheet - Page 15

• Manufacturer Part Number: ht82a836r
• Description: Usb Audio Mcu
• Manufacturer: Holtek Semiconductor Inc.

tions related to the status register may give different re-
sults due to the different instruction operations. The TO
flag can be affected only by a system power-up, a WDT
time-out or by executing the CLR WDT or HALT in-
struction. The PDF flag is affected only by executing the
power-up.
The Z, OV, AC and C flags generally reflect the status of
the latest operations.
In addition, on entering an interrupt sequence or execut-
ing a subroutine call, the status register will not be
pushed onto the stack automatically. If the contents of
the status registers are important and if the subroutine
can corrupt the status register, precautions must be
taken to correctly save it.
Interrupt Control Registers - INTC0, INTC1, MFI1C
These three 8-bit registers, known as the INTC0, INTC1
and MFI1C control the operation of the interrupts. By
setting various bits within this register using standard bit
manipulation instructions, the enable/disable function of
the all interrupts can be independently controlled. A
master interrupt bit within this register, the EMI bit, acts
Rev. 1.00
HALT or CLR WDT instruction or during a system
C is set if an operation results in a carry during an ad-
dition operation or if a borrow does not take place dur-
ing a subtraction operation; otherwise C is cleared. C
is also affected by a rotate through carry instruction.
AC is set if an operation results in a carry out of the
low nibbles in addition, or no borrow from the high nib-
ble into the low nibble in subtraction; otherwise AC is
cleared.
Z is set if the result of an arithmetic or logical operation
is zero; otherwise Z is cleared.
OV is set if an operation results in a carry into the high-
est-order bit but not a carry out of the highest-order bit,
or vice versa; otherwise OV is cleared.
PDF is cleared by a system power-up or executing the
TO is cleared by a system power-up or executing the
WDT time-out.
CLR WDT instruction. PDF is set by executing the
HALT instruction.
CLR WDT or HALT instruction. TO is set by a
Status Register
15
like a global enable/disable and is used to set all of the
interrupt enable bits on or off. This bit is cleared when an
interrupt routine is entered to disable further interrupt
and is set by executing the RETI instruction. Note in
situations where other interrupts may require servicing
within present interrupt service routines, the EMI bit can
be manually set by the program after the present inter-
rupt service routine has been entered.
Timer/Event Counter Registers - TMRL/TMRH,
TMRC
The device contains two 16-bit Timer/Event Counters.
Each Timer/Event Counter has an associated register
pair, known as TMR0L/TMR0H and TMR1L/TMR1H
which are the locations where the timer s 16-bit value is
located. Each timer also has an associated control reg-
ister, known as TMR0C and TMR1C which contains the
setup information for the associated timer.
Input/Output Ports and Control Registers
Within the area of Special Function Registers, the I/O
registers and their associated control registers play a
prominent role. All I/O ports have a designated register
correspondingly labeled as PA, PB, PC, PD, PE and PF.
These labeled I/O registers are mapped to specific ad-
dresses within the Data Memory as shown in the Data
Memory table, which are used to transfer the appropri-
ate output or input data on that port. With each I/O port
there is an associated control register labeled PAC,
PBC, PCC, PDC, PEC and PFC, also mapped to spe-
cific addresses with the Data Memory. The control regis-
ter specifies which pins of that port are set as inputs and
which are set as outputs. To setup a pin as an input, the
corresponding bit of the control register must be set
high, for an output it must be set low. During program ini-
tialization, it is important to first setup the control regis-
ters to specify which pins are outputs and which are
inputs before reading data from or writing data to the I/O
ports. One flexible feature of these registers is the ability
to directly program single bits using the SET [m].i and
from output to input and vice versa by manipulating spe-
cific bits of the I/O control registers during normal pro-
gram operation is a useful feature of these devices.
CLR [m].i instructions. The ability to change I/O pins
HT82A836R
March 20, 2008