wm9081 Wolfson Microelectronics plc, wm9081 Datasheet - Page 90

• Manufacturer Part Number: wm9081
• Description: Mono Dac With 2.6w Class Ab/d Speaker Driver, Dynamic Range Controller And Retune Mobile Parametric Equalizer
• Manufacturer: Wolfson Microelectronics plc

WM9081
Register 13h FLL Control 4
Register 14h FLL Control 5
w
FLL Control
FLL Control
REGISTER
REGISTER
REGISTER
ADDRESS
ADDRESS
ADDRESS
Interface 1
R19 (13h)
R20 (14h)
R22 (16h)
Audio
4
5
14:5
BIT
BIT
BIT
3:0
4:3
1:0
5:4
3:2
6
AIFDAC_TDM_
AIFDAC_TDM_
FLL_CLK_SRC
FLL_GAIN[3:0]
FLL_CLK_REF
AIFDAC_CHA
FLL_N[9:0]
MODE[1:0]
SLOT[1:0]
_DIV[1:0]
LABEL
LABEL
LABEL
[1:0]
N
00_0001_0
DEFAULT
DEFAULT
DEFAULT
0100
000
00
00
00
00
0
Integer multiply for F
(LSB = 1)
Gain applied to error
0000 = x 1 (Recommended value)
0001 = x 2
0010 = x 4
0011 = x 8
0100 = x 16
0101 = x 32
0110 = x 64
0111 = x 128
1000 = x 256
Recommended that this register is not changed from
default.
FLL Clock Reference Divider
00 = MCLK / 1
01 = MCLK / 2
10 = MCLK / 4
11 = MCLK / 8
MCLK (or other input reference) must be divided down
to <=13.5MHz.
For lower power operation, the reference clock can be
divided down further if desired.
FLL Clock source
00 - BCLK
01 - MCLK
10 - LRCLK
11 = Reserved
DAC Data Source Select
0 = DAC selects left channel data
1 = DAC selects right channel data
DAC TDM Slot Select
00 = Select slot 0 (Left/Right)
01 = Select slot 1 (Left/Right)
10 = Select slot 2 (Left/Right)
11 = Select slot 3 (Left/Right)
DAC TDM Mode Select
00 = 1 stereo slot (TDM off)
01 = 2 stereo slots
10 = 3 stereo slots
DESCRIPTION
DESCRIPTION
DESCRIPTION
REF
PP, Rev 3.0, April 2009
Clocking
and Sample
Rates
Clocking
and Sample
Rates
Clocking
and Sample
Rates
Clocking
and Sample
Rates
Digital audio
interface
control
Digital audio
interface
control
Digital audio
interface
control
REFER TO
REFER TO
REFER TO
Pre-Production
90