wm9081 Wolfson Microelectronics plc, wm9081 Datasheet - Page 61

• Manufacturer Part Number: wm9081
• Description: Mono Dac With 2.6w Class Ab/d Speaker Driver, Dynamic Range Controller And Retune Mobile Parametric Equalizer
• Manufacturer: Wolfson Microelectronics plc

Pre-Production
w
Table 33 Digital Audio Interface Tri-State Control
BCLK AND LRCLK CONTROL
The audio interface can be programmed to operate in master mode or slave mode by configuring
BCLK and LRCLK as outputs or inputs respectively. The direction of these signals is configured
using the BCLK_DIR and LRCLK_DIR register fields.
In master mode, the BCLK and LRCLK signals are generated by the WM9081 when the DAC is
enabled. In slave mode, the BCLK and LRCLK clock outputs are disabled by default to allow another
digital audio interface to drive these pins.
Note that BCLK and LRCLK can be configured independently as inputs or outputs, allowing mixed
Master/Slave operation.
In master mode, BCLK is derived from CLK_SYS via a programmable division set by BCLK_DIV.
In master mode, LRCLK is derived from BCLK via a programmable division set by LRCLK_RATE.
The BCLK input to this divider may be internal or external, allowing mixed master and slave modes.
The BCLK and LRCLK control fields are defined in Table 34.
R23 (17h)
Audio
Interface 2
R23 (17h)
Audio
Interface 2
REGISTER
ADDRESS
REGISTER
ADDRESS
BIT
BIT
9
6
5
AIF_TRIS
BCLK_DIR
LRCLK_DIR
LABEL
LABEL
DEFAULT
DEFAULT
0
0
0
Audio Interface Tristate
0 = Audio interface pins operate
normally
1 = Tristate all audio interface pins
BCLK Direction
(Forces BCLK clock to be output in
slave mode)
0 = BCLK normal operation
1 = BCLK clock output enabled
LRCLK Direction
(Forces LRCLK clock to be output in
slave mode)
0 = LRCLK normal operation
1 = LRCLK clock output enabled
DESCRIPTION
DESCRIPTION
PP, Rev 3.0, April 2009
WM9081
61