wm9081 Wolfson Microelectronics plc, wm9081 Datasheet - Page 62

• Manufacturer Part Number: wm9081
• Description: Mono Dac With 2.6w Class Ab/d Speaker Driver, Dynamic Range Controller And Retune Mobile Parametric Equalizer
• Manufacturer: Wolfson Microelectronics plc

WM9081
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Table 34 Digital Audio Interface Clock Control
COMPANDING
The WM9081 supports A-law and μ-law companding as shown in Table 35.
Table 35 Companding Control
Companding involves using a piecewise linear approximation of the following equations (as set out
by ITU-T G.711 standard) for data compression:
μ-law (where μ=255 for the U.S. and Japan):
A-law (where A=87.6 for Europe):
R24 (18h)
Audio
Interface 3
R25 (19h)
Audio
Interface 4
R22 (16h)
Audio
Interface 1
REGISTER
REGISTER
ADDRESS
ADDRESS
F(x) = ln( 1 + μ|x|) / ln( 1 + μ)
10:0
BIT
BIT
4:0
1
0
BCLK_DIV [4:0]
LRCLK_RATE
[10:0]
DAC_COMP
DAC_COMPMO
DE
LABEL
LABEL
DEFAULT
DEFAULT
000_0010
0_1000
_0010
-1 ≤ x ≤ 1
0
0
BCLK Rate
00000 = CLK_SYS
00001 = CLK_SYS / 1.5
00010 = CLK_SYS / 2
00011 = CLK_SYS / 3
00100 = CLK_SYS / 4
00101 = CLK_SYS / 5
00110 = CLK_SYS / 5.5
00111 = CLK_SYS / 6
01000 = CLK_SYS / 8
01001 = CLK_SYS / 10
01010 = CLK_SYS / 11
01011 = CLK_SYS / 12
01100 = CLK_SYS / 16
01101 = CLK_SYS / 20
01110 = CLK_SYS / 22
01111 = CLK_SYS / 24
10000 = CLK_SYS / 25
10001 = CLK_SYS / 30
10010 = CLK_SYS / 32
10011 = CLK_SYS / 44
10100 = CLK_SYS / 48
LRCLK Rate
LRCLK clock output =
BCLK / LRCLK_RATE
Integer (LSB = 1)
Valid from 8..2047
DAC Companding Enable
0 = Disabled
1 = Enabled
DAC Companding Type
0 = μ-law
1 = A-law
DESCRIPTION
DESCRIPTION
PP, Rev 3.0, April 2009
Pre-Production
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