wm9081 Wolfson Microelectronics plc, wm9081 Datasheet - Page 67

• Manufacturer Part Number: wm9081
• Description: Mono Dac With 2.6w Class Ab/d Speaker Driver, Dynamic Range Controller And Retune Mobile Parametric Equalizer
• Manufacturer: Wolfson Microelectronics plc

Pre-Production
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Table 37 CLK_SYS Control
TOCLK CONTROL
A timeout clock (TOCLK) is derived from CLK_SYS as an input to the zero-cross volume update
function. This clock is enabled by register bit CLK_TO_ENA, and its frequency is controlled by
CLK_TO_RATE, as described in Table 38.
Table 38 TOCLK Control
R13 (0Dh)
Clock
Control2
R14 (0Eh)
Clock
Control3
R12 (0Ch)
Clock
Control1
R14 (0Eh)
Clock
Control3
REGISTER
ADDRESS
BIT
7:4
3:0
9:8
13
1
0
2
CLK_SYS_RAT
E [3:0]
SAMPLE_RATE
[3:0]
CLK_SRC_SEL
CLK_DSP_ENA
CLK_SYS_ENA
CLK_TO_DIV
[1:0]
CLK_TO_ENA
LABEL
DEFAULT
0011
1000
00
0
0
0
0
Selects the CLK_SYS / fs ratio
0000 = 64
0001 = 128
0010 = 192
0011 = 256
0100 = 384
0101 = 512
0110 = 768
0111 = 1024
1000 = 1408
1001 = 1536
Selects the Sample Rate (fs)
0000 = 8kHz
0001 = 11.025kHz
0010 = 12kHz
0011 = 16kHz
0100 = 22.05kHz
0101 = 24kHz
0110 = 32kHz
0111 = 44.1kHz
1000 = 48kHz
1001 = 88.2kHz
1010 = 96kHz
1011 to 1111 = Reserved
CLK_SYS Source Select
0 = MCLK
1 = FLL output
CLK_DSP enable
0 = Disabled
1 = Enabled
CLK_SYS enable
0 = Disabled
1 = Enabled
TOCLK (timeout/ slow clock)
frequency select
00 = 125Hz
01 = 250Hz
10 = 500Hz
11 = 1kHz
TOCLK (timeout/ slow clock) Enable
0 = Disabled
1 = Enabled
DESCRIPTION
PP, Rev 3.0, April 2009
WM9081
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