xrt75r12 Exar Corporation, xrt75r12 Datasheet - Page 82

• Manufacturer Part Number: xrt75r12
• Description: Twelve Channel E3/ds3/sts-1 Line Interface Unit With Jitter
• Manufacturer: Exar Corporation

XRT75R12
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
B
IT
N
UMBER
1
0
T
ABLE
STS-1/
SR/DR_n
N
40: C
AME
DS3
HANNEL
_n
T
C
R/W
R/W
YPE
ONTROL
STS-1/DS3 Mode Select - Channel_n:
This READ/WRITE bit-field, along with Bit 2 (E3_n) is used to configure a
given channel into either the DS3, E3 or STS-1 Modes.
This bit-field is ignored if Bit 2 (E3_n) has been set to "1".
If Bit 2 (E3_n) is a 0:
0 - Configures Channel_n to operate in the DS3 Mode.
1 - Configures Channel_n to operate in the STS-1 Mode .
Single-Rail/Dual-Rail Select - Channel_n:
This READ/WRITE bit-field is used to configure Channel_n to operate in
either the Single-Rail or Dual-Rail Mode.
If the user configures the Channel to operate in the Single-Rail Mode, the
following will happen.
•
•
•
•
If the user configures Channel_n to operate in the Dual-Rail Mode, the fol-
lowing will happen.
•
•
•
0 - Configures Channel_n to operate in the Dual-Rail Mode.
1 - Configures Channel_n to operate in the Single-Rail Mode.
(n = [0:11] &
The B3ZS/HDB3 Encoder and Decoder blocks (within Channel_n) will be
enabled.
The Transmit Section of Channel_n will accept all of the outbound data
(from the System-side Equipment) via the TxPOS_n input pin.
The Receive Section of each channel will output all of the recovered data
(to the System-side Equipment) via the RxPOS_n output pin.
The corresponding RNEG/LCV_n output pin will now function as the LCV
(Line Code Violation or Excessive Zero Event) indicator output pin for
Channel_n.
The B3ZS/HDB3 Encoder and Decoder blocks of Channel_n will be
disabled.
The Transmit Section of Channel_n will be configured to accept positive-
polarity data via the TxPOS_n input pin and negative-polarity data via the
TxNEG_n input pin.
The Receive Section of Channel_n will pulse the RxPOS_n output pin
"High" (for one period of RCLK_n) for each time a positive-polarity pulse is
received via the RTIP_n/RRING_n input pins.
Section of each channel will pulse the RxNEG_n output pin "High" (for
one period of RxCLK_n) for each time a negative-polarity pulse is
received via the RTIP_n/RRING_n input pins.
R
EGISTER
79
M
- C
= 0-5 & 8-D)
HANNEL
n A
D
DDRESS
ESCRIPTION
L
OCATION
= 0
Likewise, the Receive
XM
6
REV. 1.0.4