xrt75r12 Exar Corporation, xrt75r12 Datasheet - Page 24

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xrt75r12

Manufacturer Part Number
xrt75r12
Description
Twelve Channel E3/ds3/sts-1 Line Interface Unit With Jitter
Manufacturer
Exar Corporation
Datasheet

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XRT75R12
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
The receiver is designed so that the LIU can recover clock and data from an attenuated line signal caused by
cable loss or flat loss according to industry specifications. Once data is recovered, it is processed and
presented at the receiver outputs according to the format chosen to interface with a Framer/Mapper or ASIC.
This section describes the detailed operation of various blocks within the receive path. A simplified block
diagram of the receive path is shown in
F
Physical Layer devices are AC coupled to a line interface through a 1:1 transformer. The transformer provides
isolation and a level shift by blocking the DC offset of the incoming data stream. The typical medium for the
line interface is a 75
materials, see
F
The Adaptive Gain Control circuit amplifies the incoming analog signal and compensates for the various flat
losses and also for the loss at one-half symbol rate. The AGC has a dynamic range of 30 dB. The peak
detector provides feedback to the equalizer before slicing occurs.
The Equalizer restores the integrity of the signal and compensates for the frequency dependent attenuation of
up to 900 feet of coaxial cable (1300 feet for E3). The Equalizer also boosts the high frequency content of the
signal to reduce Inter-Symbol Interference (ISI) so that the slicer slices the signal at 50% of peak voltage to
generate Positive and Negative data. The equalizer can be disabled by programming the appropriate register.
3.0 THE RECEIVER SECTION
3.1
3.2
3.3
IGURE
IGURE
RRing_n
RTIP_n
5. R
6. R
Receive Line Interface
Adaptive Gain Control (AGC)
Receive Equalizer
ECEIVE
ECEIVE
Figure
P
L
INE
ATH
6.
Equalizer
DS-3/E3/STS-1
AGC/
coxial cable. Whether using E3, DS-3 or STS-1, the LIU requires the same bill of
I
NTERFACE
B
Peak Detector
LOCK
D
IAGRAM
Slicer
C
ONNECTION
Receiver
RLOS_n
Figure
Detector
LOS
Clock & Data
Recovery
5.
37.5
21
0.01 F
Attenuator
37.5
Jitter
1:1
MUX
75
Channel n
Decoder
HDB3/
B3ZS
RTIP_n
RRing_n
RxNEG/LCV_n
RLOS_n
RxClk_n
RxPOS_n
REV. 1.0.4

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