sta381bws STMicroelectronics, sta381bws Datasheet - Page 149

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sta381bws

Manufacturer Part Number
sta381bws
Description
Sound Terminal 2.1-channel High-efficiency Digital Audio System Sound Terminal 2.1-channel High-efficiency Digital Audio System
Manufacturer
STMicroelectronics
Datasheet

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STA381BWS
7.21
To be noted that once the check is performed, and the tristate released, the short protection
is not active anymore until the next EAPD 0->1 toggling which means that shorts that
happened during normal operation cannot be detected.
To be noted that register 0x47 is meaningful only after the EAPD bit is set to ‘1’ at least
once.
The short-circuit protections implemented are effective only in BTL configuration, and they
must not be activated if a single ended-application scheme is needed.
Figure 42. Short-circuit detection timing diagram (no short detected)
In
in clock cycles, where the clock frequency is defined as in section 7.1.1. The gray color is
used for the SHOKx bits to indicate that the bits are carrying the status of the previous
EAPD 0->1 toggling (to be noted that after reset this state is meaningless since no EAPD
transition occurs). GND-related SHOK bits are updated as soon as the gnd test is
completed, VCC bits are updated after the vcc test is completed, and the SOUT bit is
updated after the shorted output test is completed. The gnd test, vcc test and output test are
always run (if the SHEN bit active and EAPD is toggled to ‘1’), and only if both tests are
successful (no short) do the bridge outputs leave the tristate (indicated by dotted lines in the
figure). If one of the three tests (or all) fail, the power bridge outputs are kept in tristate until
the procedure is restarted with a new EAPD toggling.
In this figure EAPD is intended to be bit 7 of register 0x05.
Extended coefficient range up to -4...4 (address 0x49, 0x4A)
CEXT_B4[1]
SHOK1[7:4]
SHOK1[3:0]
Figure 42
reserved
SHOK2[0]
D7
D7
1
OUT1A
OUT1B
OUT2A
OUT2B
EAPD
the short protection timing diagram is shown. The time information is expressed
CEXT_B4[0]
reserved
D6
D6
0
CEXT_B3[1]
CEXT_B7[1]
cycles
D5
D5
44
1
Start g n d test
Doc ID 018937 Rev 2
50005 cycles
CEXT_B3[0]
CEXT_B7[0]
Register description: Sound Terminal compatibility
D4
D4
0
Start vcc test
CEXT_B2[1]
CEXT_B6[1]
D3
D3
1
50005 cycles
CEXT_B2[0]
CEXT_B6[0]
Start o ut test
D2
D2
0
TBD cycles
CEXT_B1[1]
CEXT_B51]
1cycle
D1
D1
En d o f Sh o rt test
1
CEXT_B1[0]
CEXT_B5[0]
149/168
D0
D0
0

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