sta381bws STMicroelectronics, sta381bws Datasheet - Page 110

• Manufacturer Part Number: sta381bws
• Description: Sound Terminal 2.1-channel High-efficiency Digital Audio System Sound Terminal 2.1-channel High-efficiency Digital Audio System
• Manufacturer: STMicroelectronics

Register description: Sound Terminal compatibility
Note:
7.2.4
7.2.5
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To avoid any audio side effects (like pop noise), it is strongly recommended to soft-mute any
audio streams flowing into the STA381BWS data path before the desynchronization event
happens. At the same time any processing related to the I
only after the serial audio interface and the internal PLL are synchronous again.
Any mute or volume change causes some delay in the completion of the I
to the soft volume feature. The soft volume phase change must be finished before any clock
desynchronization.
Delay serial clock enable
Table 109. Delay serial clock enable
Channel input mapping
Table 110. Channel input mapping
Each channel received via I
channel input mapping registers. This allows for flexibility in processing. The default settings
of these registers map each I
Bit
Bit
5
6
7
R/W
R/W
R/W
R/W
R/W
RST
RST
0
0
1
2
2
S can be mapped to any internal processing channel via the
Doc ID 018937 Rev 2
DSCKE
S input channel to its corresponding processing channel.
Name
Name
C1IM
C2IM
0: Processing channel 1 receives left I
1: Processing channel 1 receives right I
0: Processing channel 2 receives left I
1: Processing channel 2 receives right I
0: No serial clock delay
1: Serial clock delay by 1 core clock cycle to tolerate
anomalies in some I
2
C configuration should be issued
Description
Description
2
S master devices
2
C operation due
STA381BWS
2
2
S input
S input
2
2
S input
S input