sta381bws STMicroelectronics, sta381bws Datasheet - Page 111

• Manufacturer Part Number: sta381bws
• Description: Sound Terminal 2.1-channel High-efficiency Digital Audio System Sound Terminal 2.1-channel High-efficiency Digital Audio System
• Manufacturer: STMicroelectronics

STA381BWS
7.3
7.3.1
7.4
7.4.1
Configuration register C (addr 0x02)
FFX compensating pulse size register
Table 111. FFX compensating pulse size bits
Table 112. Compensating pulse size
Configuration register D (addr 0x03)
DSP bypass
Table 113. DSP bypass
Setting the DSPB bit bypasses the EQ function of the STA381BWS.
Table 6:
Bit
Bit
Reserved
2
3
4
5
2
SME
D7
D7
1
0
CSZ[3:0]
0000
0001
1111
…
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
ZDE
D6
D6
0
0
RST
RST
1
1
1
0
0
0 ns (0 tick) compensating pulse size
20 ns (1 tick) clock period compensating pulse size
…
300 ns (15 ticks) clock period compensating pulse size
Reserved
CSZ3
D5
D5
0
0
Doc ID 018937 Rev 2
DSPB
Name
Name
CSZ0
CSZ1
CSZ2
CSZ3
Register description: Sound Terminal compatibility
CSZ2
BQL
D4
D4
1
1
Compensating pulse size
When OM[1,0] = 11, this register determines the
size of the FFX compensating pulse from 0 clock
ticks to 15 clock periods.
0: Normal operation
1: Bypass of biquad and bass/treble functions
CSZ1
PSL
D3
D3
0
1
DSPB
CSZ0
Description
Description
D2
D2
1
0
Reserved
Reserved
D1
D1
1
0
Reserved
Reserved
111/168
D0
D0
1
0