mc68hc908ap8a Freescale Semiconductor, Inc, mc68hc908ap8a Datasheet - Page 292

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mc68hc908ap8a

Manufacturer Part Number
mc68hc908ap8a
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Break Module (BRK)
BRKE — Break Enable Bit
BRKA — Break Active Bit
21.5.2 Break Address Registers
The break address registers (BRKH and BRKL) contain the high and low bytes of the desired breakpoint
address. Reset clears the break address registers.
21.5.3 SIM Break Status Register
The SIM break status register (SBSR) contains a flag to indicate that a break caused an exit from wait
mode. This register is used only in emulation mode.
292
This read/write bit enables breaks on break address register matches. Clear BRKE by writing a logic
0 to bit 7. Reset clears the BRKE bit.
This read/write status and control bit is set when a break address match occurs. Writing a logic 1 to
BRKA generates a break interrupt. Clear BRKA by writing a logic 0 to it before exiting the break routine.
Reset clears the BRKA bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled on 16-bit address match
1 = (When read) Break address match
0 = (When read) No break address match
Note: Writing a logic 0 clears SBSW.
Address:
Address:
Address:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
$FE0C
$FE0D
$FE00
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Figure 21-6. SIM Break Status Register (SBSR)
R
0
0
Figure 21-4. Break Address Register High (BRKH)
Figure 21-5. Break Address Register Low (BRKL)
MC68HC908AP A-Family Data Sheet, Rev. 3
14
R
6
0
6
6
0
6
13
R
R
5
0
5
5
0
5
= Reserved
12
R
4
0
4
4
0
4
11
R
3
0
3
3
0
3
10
R
2
0
2
2
0
2
SBSW
Note
1
9
0
1
1
0
1
0
Freescale Semiconductor
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
R
0
0

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