mc68hc908ap8a Freescale Semiconductor, Inc, mc68hc908ap8a Datasheet - Page 125

• Manufacturer Part Number: mc68hc908ap8a
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

During monitor mode entry, the MCU waits after the power-on reset for the host to send the eight security
bytes on pin PTA0. If the received bytes match those at locations $FFF6–$FFFD, the host bypasses the
security feature and can read all FLASH locations and execute code from FLASH. Security remains
bypassed until a power-on reset occurs. If the reset was not a power-on reset, security remains bypassed
and security code entry is not required. (See
Upon power-on reset, if the received bytes of the security code do not match the data at locations
$FFF6–$FFFD, the host fails to bypass the security feature. The MCU remains in monitor mode, but
reading a FLASH location returns an invalid value and trying to execute code from FLASH causes an
illegal address reset. After receiving the eight security bytes from the host, the MCU transmits a break
character, signifying that it is ready to receive a command.
To determine whether the security code entered is correct, check to see if bit 6 of RAM address $60 is
set. If it is, then the correct security code has been entered and FLASH can be accessed.
If the security sequence fails, the device should be reset by a power-on reset and brought up in monitor
mode to attempt another entry. After failing the security sequence, the FLASH module can also be mass
erased by executing an erase routine that was downloaded into internal RAM. The mass erase operation
clears the security code locations so that all eight security bytes become $FF (blank).
Freescale Semiconductor
PTA0
RST
V
NOTES:
The MCU does not transmit a break character until after the host sends the
eight security bits.
DD
1 = Echo delay, approximately 2 bit times.
2 = Data return delay, approximately 2 bit times.
4 = Wait 1 bit time before sending next byte.
FROM HOST
FROM MCU
4096 + 32 ICLK CYCLES
Figure 8-8. Monitor Mode Entry Timing
MC68HC908AP A-Family Data Sheet, Rev. 3
Figure
1
256 BUS CYCLES (MINIMUM)
NOTE
4
8-8.)
1
1
2
4
1
Security
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